Part Number: AM6526 Hi,
My customer has some questions about power supply pins for internal PLLs. Could you answer their questions below ?
There are some power supply pins for internal PLLs such like VDDA_PLLMPU, etc...
- Are there denoise filters on…
Part Number: AM6526 Trying to get the latest " SITARA-DDR-CONFIG-TOOL-AM65X/DRA80XM" tool. Did a search found the page that list the 3 versions for the different processors, but when I click on the " SITARA-DDR-CONFIG-TOOL-AM65X/DRA80XM"…
see below the post training register dumps (I called them "read out register"):
Read:R_DRV@Mem: 34R; R_ODT@Ctrl: 40R
Read: R_ODT@Ctrl: 48R; R_DRV@Mem: 48R
Read: R_ODT@Ctrl: 60R; R_DRV@Mem: 48R //sorry, that wasn't labeled correctly…
Below is the inputs i received.
REFCLK IOs were designed to be compliant to the PCIe specification, so the customer should connect these pins as defined by the PCIe specification.
I also understand the PHY requirement is to add AC coupling…
Part Number: AM6526 From Table 6-1 in the AM65xx datasheet (Pin Attributes) we see most pins are "HI-Z" at RESET.
I am supporting an application where the GPMC address pins (GPMC0_A**) are connected to MRAM; they are not PU/PD externally.
We are internally reviewing based on the available information.
I still do not have an update to share.
I assume this is not stopping any of the development on your side.