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  • AM6548: Is it possible to maintain cache coherency between clusters with hardware in AM6548?

    Resolved
    Part Number: AM6548 Tool/software: Hi, support team! We are building an RTOS system using only two cores in one cluster of AM6548. Recently, we expanded this system to use two clusters (four cores), but it seems that cache coherency cannot be maintained…
    • Resolved
    • Answered

  • RE: AM6548: GPIO assignement in multi-core application

    Resolved
    Hi Nick, thanks for your detailed question, I'll go through your points (your in blue ): Processors are able to control peripherals that are in a different device domain. I am more experienced with AM64x, so the details I provide here will be based…

  • AM6548: About STREX/LDREX between two clusters.

    TI Thinks Resolved
    Part Number: AM6548 Tool/software: Hi, support team! The STREX/LDREX instructions should undoubtedly work effectively within CC_ARMSS0, but will they function properly between CC_ARMSS0 and CC_ARMSS1?

  • AM6548: Usage of BCM(Broadcast Mode) in MSMC_COHCTRL.

    TI Thinks Resolved
    Part Number: AM6548 Tool/software: Hi, Support team. We have not yet succeeded in maintaining cache coherence between clusters. We are looking into the Linux implementation, but due to its vast scope, we have not yet identified where this is handled…

  • RE: AM6548: AM6548 C/C++ development platform without need to use bootable RTOS image.

    I believe this issue is closed - please let me know if you need any additional assistance.
    • Answered

  • RE: AM6548: AM6548 U-boot - Load Firmware onto R5_1 (rproc 1)

    Resolved
    Hello Benjamin, Glad to hear that you were able to resolve your issue, and thank you for replying back with your solution! That can be helpful for anyone else who has the same question. Yes, some devices like AM65x have MSMC that can be allocated between…

  • RE: AM6548: U-Boot SPL could not load u-boot proper: QSPI: QSPI is still busy after poll for 10000 times.

    Since there is no activity for more than 6 months, please let us know whether this is still a problem. Br, Tommy
    • Answered

  • RE: AM6548: SR 2.0 PRU-ICSSG multicast address filter support in Linux

    Resolved
    Hello Ian, Thank you for the update over e-mail that with the firmware patch2 the multicast test between EMAC ports of same ICSSG is passing now. Ian Willats said: 5: From my previous thread: In my experiments it seems that when peer ports on the same ICSSG…
    • Answered

  • AM6548: AM6548 SR2.0 - RTOS PDK ICSSG MII Support

    Resolved
    Part Number: AM6548 Tool/software: Hello, For the PDK RTOS code, and ICSSG firmware for the AM6548 IDK, does TI support using the ICSSGs in MII mode? How would one go about doing this? In a design we have, so far I have modified the pinmux settings for…
    • Resolved

  • RE: AM6548: UART to RS 485 Conversion Issue

    Hi Sarfaraz, Yes I thought transmitting just one char makes it easier to check the RTS pin state before, during, and after the transmission on a scope or logical analyzer. sarfaraz shaikh said: for IDK board I could not find any pinmux setting for wkup…

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