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Showing 53 results View by: Thread Post Sort by
  • CD4013B: CD4013B: Issues Regarding the Clock of CD4013B

    Enzo Yin
    Enzo Yin
    TI Thinks Resolved
    Part Number: CD4013B My circuit connection is as shown in the diagram below. I noticed that when I use only the first channel, a special phenomenon occurs: the output of Q1 follows the level of the CLK1 signal, rather than toggling on the rising edge…
    • 7 months ago
    • Logic
    • Logic forum
  • CD4013B: Test socket for CD4013BNSR

    Koki Tamai
    Koki Tamai
    TI Thinks Resolved
    Part Number: CD4013B Hi, Our customer is looking for a test socket for the CD4013BNSR, which uses TI’s 14-pin NS package. The socket will be used in a test fixture to connect the device to a circuit without soldering and to allow the device to be…
    • 18 days ago
    • Logic
    • Logic forum
  • CD4013B: Need TINA simulation model

    Smitha  R
    Smitha R
    TI Thinks Resolved
    Part Number: CD4013B Other Parts Discussed in Thread: TINA-TI Hi, We are using CD4013BM96 for our map reading lamp - proximity sensing detection application. For that we are planning to implement CD4013BM96. Kindly provide TINA simulation model for…
    • 2 months ago
    • Logic
    • Logic forum
  • CD4013B: Maximum trCL/tfCL value at VDD = 7.5 V

    Koki Tamai
    Koki Tamai
    TI Thinks Resolved
    Part Number: CD4013B Hi, I have a question about the maximum clock input rise and fall times, trCL and tfCL, for the CD4013B. The datasheet specifies: - VDD = 5 V: 15 µs max - VDD = 10 V: 10 µs max How should the maximum trCL/tfCL value…
    • 2 months ago
    • Logic
    • Logic forum
  • CD4013B: Aging effect on VIH and input switching voltage

    Koki Tamai
    Koki Tamai
    TI Thinks Resolved
    Part Number: CD4013B Hi, The CD4013B datasheet specifies VIHmin = 3.5 V at VDD = 5 V. We understand that VIHmin is the guaranteed High input level and not necessarily the actual internal switching threshold. Could you please confirm the following…
    • 2 months ago
    • Logic
    • Logic forum
  • CD4013B: Definition of clock input rise and fall time, trCL and tfCL

    Koki Tamai
    Koki Tamai
    TI Thinks Resolved
    Part Number: CD4013B Hi, I have a question about the definition of the clock input rise and fall time for the CD4013B. In Section 6.3, Recommended Operating Conditions, the datasheet specifies the following maximum values for trCL and tfCL : VDD…
    • 2 months ago
    • Logic
    • Logic forum
  • CD4013B: [140-052026] - SU2102-0013 - TEXAS INSTRUMENTS FRANCE

    Elise RUPAIRE
    Elise RUPAIRE
    TI Thinks Resolved
    Part Number: CD4013B Bonjour, Nous vous contactons au sujet d'une demande d'obsolescence effectuée par nos clients sur leurs systèmes. Suite a une recherche sur votre site web, certaines références non trouvées, Pourriez-vous indiquer le statut…
    • 5 months ago
    • Logic
    • Logic forum
  • Answered
  • CD4013B: REMINDER - HEMERIA [140-052026] - SU2102-0013 - TEXAS INSTRUMENTS FRANCE

    Elise RUPAIRE
    Elise RUPAIRE
    Resolved
    Part Number: CD4013B Hello, I would like to follow up on our request, as HEMERIA is still awaiting your response. In order to meet our internal deadlines, we would appreciate it if you could provide the requested information by June 18. Could…
    • Resolved
    • 4 months ago
    • Logic
    • Logic forum
  • CD4013B: Is there an internal clock masking time, and can a missed clock cause Q to remain low?

    Koki Tamai
    Koki Tamai
    TI Thinks Resolved
    Part Number: CD4013B Hi, We are investigating an intermittent operation observed with the CD4013B. We observed a clock waveform that may cross the input threshold more than once. After the first possible clock detection, another transition occurs…
    • 2 months ago
    • Logic
    • Logic forum
  • CD4013B: Interfacing CD4010B with CD4013B

    Kristofer Slintak
    Kristofer Slintak
    TI Thinks Resolved
    Part Number: CD4013B Other Parts Discussed in Thread: CD40106B Tool/software: Hello, I am prototyping a simple toggle switch utilizing the buffer and D-F-F from the title. They are configured as in Figure 9 from the CD4013B datasheet. The clock signal…
    • over 2 years ago
    • Logic
    • Logic forum
>

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