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Showing 5 results View by: Thread Post Sort by
    Answered
  • SN74HC165: GPIO extension for microcontroller in combination with the SN74HC595

    Markus Nabecker
    Markus Nabecker
    Resolved
    Part Number: SN74HC165 Other Parts Discussed in Thread: SN74HC595 , CD74HC299 , SN74LVC1G04 , SN74AHC1G04 Dear support team, I am currently working at an GPIO extension for a microcontroller. I want to use 1 SPI Port for the extension with digital inputs…
    • Resolved
    • over 3 years ago
    • Logic
    • Logic forum
  • RE: SN74LVC1G34DRL Power Up Logic 1 Behaviour

    ShreyasRao
    ShreyasRao
    Hi Jose , I assume you are talking about SN74LVC1G74 . I have attached an app note on the behavior of clocked devices . The output at startup is not guaranteed until a valid clock input signal comes in . 5277.powerup_clockeddevices_scha005a.pdf
    • over 10 years ago
    • Logic
    • Logic forum
  • RE: CD4541B - Power up state of Q output and Autoreset with 5V supply

    ShreyasRao
    ShreyasRao
    Hi Kiran , I have attached an app note explaining the initial state on power up for the clocked devices . During power up , the Q and Q/ would be complimentary but not determinate . Once the power up is done and with valid clock or input , the outputs…
    • over 10 years ago
    • Logic
    • Logic forum
  • Answered
  • RE: As the flip flop 's the CD4013 chip , go to the initial state Q 0 and Q BAR 1 , when the circuit is energized ?

    ShreyasRao
    ShreyasRao
    Resolved
    Hi Tarcisio , You are right about the initial state for the CMOS circuits . they are undefined until a valid signal is applied .In case of clocked circuits ,the output is indeterminate before valid clock signal comes in . I will attach an app note explaining…
    • over 10 years ago
    • Logic
    • Logic forum
  • RE: 74HCT

    ShreyasRao
    ShreyasRao
    This device has a master reset which when activated (low) will keep outputs at logic low regardless of the clock or data input .You can tie this to Vcc through pullup resistor which should have the outputs low . The behavior of clocked devices output…
    • over 10 years ago
    • Logic
    • Logic forum

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