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Showing 145 results View by: Thread Post Sort by
    Answered
  • RE: AM62A7-Q1: AM62A opp low

    Anshu Madwesh
    Anshu Madwesh
    Resolved
    Hello, PLL0, HSDIV0 is the clock source for the Main CBASS. This means the HSDIV divides the PLL Clock speed to meet the required input clock requirements. By default, PLL0 is 2000MHz. The HSDIV0 divides the PLL Clock by 4 to make 500MHz (2000MHz/4…
    • over 1 year ago
    • Processors
    • Processors forum
  • Answered
  • RE: AM3358: Bare metal programming: change the system clock?

    PaulM
    PaulM
    Resolved
    The AM3358 has several PLLs. There is a section in the TRM describing each of their operation and configuration. MPU_PLL - TRM chapter 8.1.6.9 DDR_PLL - TRM chapter 8.1.6.11 CORE_PLL - TRM chapter 8.1.6.7 PER_PLL - TRM chapter 8.1.6.8 Display PLL - TRM…
    • over 1 year ago
    • Processors
    • Processors forum
  • RE: 66AK2G12: Clock generation of CHIP_CLK1 by PLL controller

    Bill Taboada
    Bill Taboada
    Hi, The best method for understanding the clocking in the 66AK2G12 is to use the clock tree tool available on TI.com. https://www.ti.com/tool/CLOCKTREETOOL Regards, Bill
    • over 5 years ago
    • Processors
    • Processors forum
  • Answered
  • AM69: PCIe reference clocks

    Daisuke Maeda
    Daisuke Maeda
    Resolved
    Part Number: AM69 Other Parts Discussed in Thread: CLOCKTREETOOL , Our customer wants to know more about reference clocks for PCIe. Q1) Is SERDESn_REFCLK_x an input/output or input only? In datasheet: Each PCIe subsystem has a differential reference…
    • Resolved
    • over 1 year ago
    • Processors
    • Processors forum
  • Answered
  • RE: Linux: DSP CLK

    Peter Li79
    Peter Li79
    Resolved
    Hi, Here is a ClockTreeTool: www.ti.com/.../clocktreetool Please use omapconf utility and dump a .rd1 file. Then use the CTT tool open this .rd1 file, which can show the current clock setting. With the help of this tool, we can find the right…
    • over 6 years ago
    • Motor drivers
    • Motor drivers forum
  • Answered
  • [FAQ] AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359 Custom board design – Collaterals to Get started

    Kallikuppa Sreenivasa
    Kallikuppa Sreenivasa
    Resolved
    Other Parts Discussed in Thread: AMIC110 , CLOCKTREETOOL , SITARA-DDR-CONFIG-TOOL , AM3352 , AM3351 , AM3357 , AM3356 , AM3354 , AM3359 , AM3358 , AM62L Hi TI Experts, Can you provide a List of collaterals that can be referred when starting a custom…
    • Resolved
    • over 2 years ago
    • Processors
    • Processors forum
  • AM6548: About access time to MCU_MSRAM and DDR.

    tomitama
    tomitama
    Part Number: AM6548 Other Parts Discussed in Thread: TMDX654IDKEVM , CLOCKTREETOOL In the R core on TMDX654IDKEVM, We are verifying the access time to MCU_MSRAM and DDR. question 1 Please tell me about the theoretical value (MHz) at the time of Read…
    • over 4 years ago
    • Processors
    • Processors forum
  • Answered
  • RE: AM625: Where´s the API for M4F timers?

    Vaibhav Kumar
    Vaibhav Kumar
    Resolved
    Hello Rafael, I have noted your question. For information about prescaler values and frequency fed to the M4F Timers, I would highly encourage you to go through the tool which TI provides, namely Clock Tree Tool. For AM62x you can find the clock…
    • over 1 year ago
    • Processors
    • Processors forum
  • Answered
  • RE: DRA712: Spread sheet for clock tree design

    Alex Bashkov
    Alex Bashkov
    Resolved
    Hitoshi-san, I am not aware of a clocking spreadsheet per se. We do have a clock tree tool though: https://www.ti.com/tool/CLOCKTREETOOL Will this work for you? thanks, Alex
    • over 5 years ago
    • Processors
    • Processors forum
  • Answered
  • RE: AM4372: Driving the GPMC with an external oscilator

    Mark M
    Mark M
    Resolved
    Hi Shai, Short answer is no the GPMC cannot take in an external clock source as its reference clock. Its only clock source comes through the core PLL and HSDIVIDER. OSC0 is limited to 19.2-MHz, 24-MHz, 25-MHz, or 26-MHz. The PLL could be bypassed, but…
    • over 2 years ago
    • Processors
    • Processors forum
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