Part Number: DAC7654 Hello,
I am trying to use the DAC7654 with an FPGA that creates the signals for the serial interface of the DAC. My signals from the FPGA are LVCMOS33 and through the wiring from FPGA to the evalboard (which hosts the DAC7654) I have…
Hi Ben,
I am facing the same problem as you were. I was wondering did you mean physically disconnect the pin from Ethernet chip by saying "completely lift pin Ethernet CRS up". I was wondering how did you do it on the PCB?
Many many thanks…
Other Parts Discussed in Thread: DAC7654 In a SPI interface DAC with sampline rate 100KSps, like the DAC7654.
How often should the data be written to the DAC from a uC. The SPI speed is usually in MHz. Do you write data, at say 1MHz. Do you have to wait…
Hello Matteo,
The information in the application section is a little bit misleading. The requirement is simply that SYNC must be high for at least 1 maximum SCLK period of 20ns or 40ns, depending on your AVDD supply voltage. In cases where SCLK is a continuous…
Other Parts Discussed in Thread: OMAPL138 , DAC7654 Hello I have questions about connecting converters to the OMAPL138. I'm not sure if this is the right forum, and if not please let me know where to post or who to talk to.
1) Can two devices (DAC and…
