Part Number: DP83848I Tool/software: Hi SIR
Currently, we are using the DP83848I PHY chip and want to disable the MDIX function through the register. According to the manual, setting bit 15 of 0X19 to 0( disable MDIX EN), but the verification was…
Part Number: DP83848I Tool/software: Hello,
I have a question regarding the DP83848IVVX/NOPB.
I am currently designing hardware with the DP83848I using the RMII interface. Could you please review the attached schematic? I would appreciate it if you…
Part Number: DP83848I Tool/software: We use the DP83848I. The design is created according to the guidelines. The power supply is a stable 3,3V. and t he IC has a RMII interface to an STM processor. On other side it is connected to an RJ45 connector with…
Part Number: DP83848I Tool/software: Dear Technical Support Team,
Q1
Does “Default” in 4.8 Strap Options mean without external pull-down resistor? Also, if I want to use Mode 2, should I add a PullDown resistor?
LED CONFIGURATION: This strapping…
Part Number: DP83848I Tool/software: Hi, Team.
We have received an inquiry from one of our customers regarding the Ethernet PHY device DP83848IVV .
Operating Environment:
Connected CPU : Renesas R7S721001VCBG (RZ/A1H microcontroller)
Interface…
Part Number: DP83848I Tool/software: Hello, According to datasheet page #14, the definition of T2.14.2 is from RX_CLK fall to RXD_0, RX_DV delay. However, looking at datasheet Figure 5-14, it is from RX_CLK rise to RXD_0, RX_DV delay. Which is true? Best…
Part Number: DP83848I Tool/software: Hello,
Q1: At SNI mode, how much is RXD[0] to RX_CLK setup time and hold time respectively?
Q2: At SNI mode, how much is TXD[0] to TX_CLK setup time and hold time respectively? Best regards, K.Hirano
