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  • DP83867CR: Viterbi Module Configuration (VTM_CFG)

    Part Number: DP83867CR Hi all, I would like to ask you the question about 8.6.35 Viterbi Module Configuration (VTM_CFG) register. What is the meaning of this register? My customer uses DP83867CR to develop the Encoder/Decoder. Packet loss occured d uring…
    • Answered

  • DP83867CR: DP83867CR

    Resolved
    Part Number: DP83867CR Hello TI team, We are using Ethernet PHY transceiver DP83867CR in our project. We want to build a 1000m ethernet connection between DP83867CR and a PC. We got crossover connection between D3 and D4 pair in the layout. Our connection…
    • Resolved
    • Answered

  • DP83867CR: Supply voltage for VDD1P1 pins for RGZ package

    Resolved
    Part Number: DP83867CR Hi team, according to the datasheet the supply voltage with RGZ package is 1V: The device is used on a board where only 1.1V is available (FPGA Core Supply). An additional regulator for the PHY should be omitted, so the 1.1V were…
    • Resolved
    • Answered

  • DP83867CR: Rx errors (RXDV_ER / reg 0x0015) only with particular Marvell PHY link partner

    Resolved
    Part Number: DP83867CR Hi, Our design is based on a Zynq (Xilinx), Linux is running on the ARM, and MAC is implemented on the FPGA. Our test: network trafic has 2 parts: test stream / dummy load stream The test stream is under monitor, we check that we…
    • Resolved
    • Answered

  • DP83867CR: JTAG RESET and INT/PWDN

    Resolved
    Part Number: DP83867CR How do the INT/PWDN and RESET_N pins need to be configured for proper JTAG operation? We believe the INT/PWDN pin needs to be held high for the JTAG controller to work, but what about the RESET_N pin? Does the JTAG controller override…
    • Resolved
    • Answered

  • DP83867CR: Behavioural model

    Resolved
    Part Number: DP83867CR Hi, Is there a Verilog or VHDL behavioural model available for the DP83867CR PHY?
    • Resolved

  • DP83867CR: How to do the DP83867 compliance test for Slave jitter test with TCLK

    TI Thinks Resolved
    Part Number: DP83867CR Hi Ti experts, DP83867 compliance test, for probing for 1000 Base-T SLAVE TX_TCLK Jitter(Filtered and Unfiltered) While DUT is operating in the SLAVE timing mode, the jitter on the DUT ’ s transmit clock (TX_TCLK) relative…
    • Answered

  • RE: DP83867CR: Powering down sequrnce

    Resolved
    Hello Gerome-san, Sorry for the late reply. I understand. Thanks for the support. Regards, Masa

  • DP83867CR: DP83867 use for Multi-Port

    Part Number: DP83867CR Hi, We are using iMX8 SMARC module, it has Texas Instruments DP83867 Ethernet Controller the module. And we interfaced the DP83867 module with integrated magnetic RJ45 connector. So, we are able to link and achive the 1000mbps speed…

  • DP83867CR: Power sequence and leak current

    TI Thinks Resolved
    Part Number: DP83867CR Hello, On the datasheet stated that "There is no requirement for the sequence of the supplies when operating in two-supply mode." Our customer tried to validate behavior if power up VDD1P0 at first and later on power up…

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