Part Number: DP83TC811S-Q1 Hi,TI Team
When we use this chip, it can work normally in master mode, but when we set it to slave mode, we write 0 to the 14th bit of 0x0834 register.
Then connect the gateway in master mode and restart the device several times…
Part Number: DP83TC811S-Q1
Hi, TI team
From register PLR_CFG1, bits 12 to 13, can I see the polarity of the current ethernet connection?
According to our test, after normal connection and reverse connection of pins 12 and 13, the values of these two…
Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811 step:
1. 0x0475 has been set to 0x2000 or 0x3000;
2. and there is no power down or reset;
3.swap the two wires of the MDI and reconnect;
4.wait a few seconds;
5.read register 1, return…
Part Number: DP83TC811S-Q1 Hi Expert:
Our Customer designing Ethernet PHY into Gateway they are request DP83TC811S-Q1 Functional Safety FIT Rate, FMD and Pin FMA report, could you please help support the requirement?
Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811 , DP83TD510E Hi,
For a new project I would like to get some answer on the following questions:
I need a PHY for Ethernet communication between central unit and up to 16 units.
Part Number: DP83TC811S-Q1 Hello, we used this chip to connect with MAC using RGMII when making car Ethernet.
Excuse me, if we want to set it to 100base-t1 slave mode, what registers do we need to set and what is the initialization sequence?
Part Number: DP83TC811S-Q1 hi teams:
Our customer has configured LDG_CTRL1 register and LDG_CTRL2 register, The fine gain of register is the lowest and the highest:
The minimum is - 16% and - 60%. It is found that the test that will affect EMC will be affected…
Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811 HI TEAMS:
We are debugging the sleep wake function of dp83tc811 chip
I found I couldn't sleep.
Condition: pull up the wake before the PHY is powered on, and the PHY chip…