Part Number: DP83TC813R-Q1
Hi team,
My customer have a question for 0x11 bit[15] dis_clk_125. They use RGMII.
What is CLK125? And please tell me difference of behavior when enable/disable.
Regards,
Youhei MIYAOKA
Part Number: DP83TC813R-Q1 Hi team,
I understand 0x11 bit[11] sgmii_soft_reset is setting for SGMII, so it is not a setting for RGMII.
Are there any register fields that apply to RGMII settings, even if the field name does not include rgmii, for example…
Part Number: DP83TC813R-Q1 Hi team,
My customer want to know the difference between W and WSC. Could you tell me please?
And also I want to know the behavior of W0S(W1S).
Regards,
Youhei MIYAOKA
Part Number: DP83TC813R-Q1 Other Parts Discussed in Thread: LMK6C Hello,
Is there a recommended 50-Mhz oscillator for use with the DP83TC813R-Q1 when used in RMII slave mode? I am looking at TI's LMK6CE05000CDLF - is that a good option? If so, is there…
Part Number: DP83TC813R-Q1
Hi team,
How to set the DP83TC813 internal PUPD? Is it the flow of examining default settings in SI simulation, measuring actual equipment, and then setting up PU/PD?
And in the ibis model, what is the PU/PD setting for the…
Part Number: DP83TC813R-Q1 Other Parts Discussed in Thread: DP83TC811-Q1 , DP83TC811 Hello, I want to use DP83TC813R standalone as an ethernet status detector without any microcontroller
the default 0 register states appear like i can use the LED_1 output…
Part Number: DP83TC813R-Q1
Hello, Mellin
I continue my questions in email here.
the 100Mbase-T1 RGMII operates in shift mode, communicating with SOC.
in the email, your reply is as below:
1. about RGMII OUTPUT TIMING:
the RX timing parameters are specified…
Part Number: DP83TC813R-Q1 team,
Can you please advise what are the consequences of exceeding max RX rise/fall times ?
Is there a equation ruling rise and fall time as a fonction of the capacitive load ? as the timing is provided for 5pf.
thanks
Part Number: DP83TC813R-Q1 Hi team,
My customer have question for tR/tF(RGMII).
In datasheet, Max tR/tF value is 1.2ns. Is this 100Base-T1 standard value?
Is there possibility that the tR/tF of the RGMII RXC (PHY sent to SoC) exceed this value with a PHY…