Part Number: DRA750 HI Ti Team,
We are facing an issue where Kernel is over writing "DSP frequency ( Register: CM_CLKSEL_DPLL_DS RW 32 0x0000 0140 0x4A00 5240 )" which is setting by bootloader. We don't want to change frequency set by Bootloader…
Part Number: DRA750 Hi TIs:
How can I confirm DSP is booting up correctly?
If I can find the DSP power up message in the kernel boot log, and execute MessageQApp to exchange data with DSP correctly,
Is it can be considered as evidence that DSP is booting…
Part Number: DRA750 Hi TIs:
The BSP version we used is Process SDK 03_02_00_03, due to customer requirement we need to test DSP function on DRA750 CPU and its ram size is 256MB. According to my understannding, the default cma setting of DSP is over 256MB…
Part Number: DRA750 Hi TI Team,
I am working j6 DRA75x/74x SoC , we are using kernel version 4.4.14
we need to enable hard lockup functionality for certain use cases.
However we see that the support is not available.
So what needs to be done to enable …
Part Number: DRA750 Hi,
We are using "DRA752BPGABCQ1" in our circuit and validating QSPI read timings. Can you please clarify read timing of the processor.
As per TRM (referring to table, page#), the processor clock reads the slave device data…
Part Number: DRA750 As per SD card standard the CLK frequency in high speed should be 50MHz, but in the DRA75x datasheet it is mentioned as 48MHz? could you please confirm it is correct value?
Because I'm using an SD card interface at MMC1, the SD card…
Part Number: DRA750 A customer identified a timing violation in his system using MMC1 in Default Speed mode. Based on our DM, the required hold time in this mode is 20.46ns. Measured hold time is only in the range of 15ns. So far connected SD cards are…
Part Number: DRA750 hi experts:
I have a opengles project, only need ipu2 and a15 core. I want boot more fastly, so i reference "Early Boot and Late Attach in Linux" guide, let mlo loaded dra7-ipu2-fw.lzop and start kernel use single boot.
…
Other Parts Discussed in Thread: DRA750 Our processor is DRA750, with 3.02.00.03 SDK version.
As title, I want to make sure that DSP part work fine, how can I confirm? through register reading or any tool can help me achieve this requirement?
We already…