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  • DRA76P: PCIe controller and clock configuration in DRA76P

    Part Number: DRA76P Tool/software: Hello TI team, My team is developing a custom board with host processor DRA76P, running with Android 8 (Oreo) and Linux kernel 4.4. Currently, we are working in the integration of a JodyW377 BT/WIFI into the SOC. The…
    • Answered

  • DRA76P: HEVC decode support

    Resolved
    Part Number: DRA76P Other Parts Discussed in Thread: C66XCODECS , TMS320C6678 Tool/software: Hello, I'm looking for information regarding support for H265/HEVC video decode in the dra767p SOC (we have a custom board based on it). Currently we have…
    • Resolved

  • DRA76P: USB Eye diagram failure

    TI Thinks Resolved
    Part Number: DRA76P Other Parts Discussed in Thread: DRA742 Tool/software: Hi, I'm using the DRA767P processor in an application featuring USB2.0 interface. We run a preliminary test previous to USB-IF certification and we noted a slight deviation on…

  • DRA76P: Power consumption

    Part Number: DRA76P Other Parts Discussed in Thread: DRA718 , Tool/software: Hi E2E team, I'm working with DRA767P in a new design and I need to run thermal simulations on the related housing. Some time ago, when I worked with the DRA718 there was an…

  • DRA76P: DRA767PSGACDQ1

    Part Number: DRA76P Is a external calibration resistor required for DDR on DRA76xP or is this managed internally if so how?
    • Answered

  • DRA76P: Connecting i2s (mcasp) to PCM interface (bluetooth)

    Resolved
    Part Number: DRA76P Tool/software: Hi, We want to connect a BT chip (PAN9026) to the DRA via McASP. The BT chip has a PCM interface. How can we connect the PCM interface to our I2S interface? Do we need a bridge for I2S/PCM? Regards, Miguel
    • Resolved

  • DRA76P: Disable CAN bus from vision_sdk rvc

    Part Number: DRA76P Hi, We are using SDK v6AO.1.1, android 8.1, linux kernel 4.4.117, and vision_sdk to manage cameras. When we are displaying cameras images from IPU2 and using CAN from Android (linux 4.4) after some time, we get: [ 702.034663…

  • DRA76P: When using 2GB of DDR3 it is better to have 4 chips in 1 EMIF or 2 chips in EMIF 1 and 2 chips in EMIF 2

    Part Number: DRA76P Tool/software: I am starting a project with the Micro DRA 767. The idea is to use 2G of DDR3 RAM. Looking at the EVM we can use 4 banks of 8 bits in EMIF 1 or 2 banks of 16 bits in EMIF 1 and another 2 banks of 16 bits in EMIF 2. I…
    • Answered

  • DRA76P: Ser/Des Configuration in Custom Board having dra76p architecture

    Resolved
    Part Number: DRA76P Hello All, We are trying to configure Ser/Des for our Custom board based on dra76p architecture. We are having usecase running on HLOS while our capture link will be going to run on IPU1_0. We have added pinmuxing changes on mux_data…
    • Resolved

  • DRA76P: How to configure McASP to receive PDM?

    Part Number: DRA76P Hello. My client have hardware solution with 2 MEMS MIC with PDM (MP34DT05-A) connected directly to McASP6 (aclkx, axr0). In the other topic your answer was "PDM audio can be captured with McASP.". Is it possible, and how to configure…

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