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  • DRA821U: DRA821U, Questions about Jacinto Connected Cars on AWS: Getting Started Guide

    Part Number: DRA821U Hi, My name is Chanwoo Nam SDK: PROCESOR-SDK-LINUX-J7200, version 08.01.00.0 Guide documentation: Jacinto Connected Cars on AWS: Getting Started Guide We are attempting by referring to pages 7 through 10 of the guide document Jacinto…

  • DRA821U: Firewall disable

    Part Number: DRA821U Hi Experts, Our customer is not able to start the cores on the DRA821U board, as the firewall is enabled. Is there a method/steps to disable the firewall? If yes, can you please share the steps. Since the firewall is enabled it's thro…
    • Answered

  • RE: DRA821U: DRA821U: NorFlash(Cypress) OSPI INDAC Read Access issue

    Resolved
    Hello, Zhongyi Liao said: and it is the ram address that cause this issue Did you try this with a 4-byte aligned ram address and it worked correctly? Regards, Erick

  • RE: DRA821U: DRA821U

    Hi, Apologies for the delay. Shobha AC said: What are the settings we need to make in the Ethernet Firmware to receive broadcast packets on specific port for vlan interface. SDK 8.1+, all the cores will receive the broadcast packets and will be able to…
    • Answered

  • DRA821U and XDS110

    Resolved
    Other Parts Discussed in Thread: DRA821U , DRA821 Hi,Mr. I'm going to design DRA821U and use XDS110 for JTAG Debugger. I will use following Pin for XDS110 TMS,TRSTn,TDI,VTREF(3.3V?),TDO,GND,TCK,EMU0,EMU1,nRESET and i don't use KEY,EMU2,EMU3,EMU4.…
    • Resolved
    • Answered

  • RE: DRA821U: about GPIO_VIRT

    Resolved
    Hi Parth. I checked the boardconfig and changed the mapping regarding the interrupt router. This allowed me to do the interrupt routing (IR configuration) I expected. Thank you.

  • RE: DRA821U: GPIO

    Hi Ming, Trying to understand the flow here. ming li said: DRA821 starts MCU2_0 (main)first, then MCU1_0 (mcu) is started by MCU2_0, How are you starting the MCU2_0? What app are you running on both the cores? ming li said: the software go to OS trap when…

  • RE: DRA821U: DRA821U: UDMA utilize OSPI access NorFlash configure read data length of every read command

    Both the pictures are CS and clock during udma transfer from NorFlash to DDR. we are not using any flash read API, they are all from one udma transfer. some code listed here: Std_ReturnType ReadFlashByUdma(uint32 srcAddr_u32, uint32 destAddr_u32, uint32…

  • RE: DRA821U: 821 slave SPI

    thanks to zekun.bai, By setting the WL bit and CTRLMMR_SPI3_CLKSEL, the 821 can communicate with the TC397, and I am currently testing the SPI communication between the TDA4 and the 397.

  • DRA821U: U-Boot TFTP Timeouts

    Part Number: DRA821U I'm working with a customer who is experiencing timeouts when trying to TFTP large files. With particularly large files, the timeouts start adding up until they reach the limit of 10, at which point the transfer fails. The customer…

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