Part Number: DRA821U-Q1 Tool/software: Hello,
As part of functional safety, does the DRA821U-Q1 support CPU monitoring, clock monitoring, and SEU (single event upset) verification? If these features are supported, could you please provide details on…
Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821U Q1: does DRA821U-Q1 supports Hardware Random Number generators which meet NIST SP-800-90B (Entropy Sources) ?
Q2: Can debug interface (JTAG) be locked and no debugging possible after…
Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821 Tool/software: Hi Team,
i selected DRA821U-Q1 series processor for a new project. i have few queries regarding this processor. given below.
1. our requirement 3 x 1Gbps RGMII ethernet…
Part Number: DRA821U-Q1 Tool/software: Dear Texas Instruments Support Team,
I am currently working with a Jacinto board and encountering an issue where the drivers for I2C, SPI, and UART do not appear to be reflected or functioning as expected . Specifically…
Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821 Tool/software: Hi Team,
i selected DRA821U-Q1 series processor for a new project. i have few queries regarding this processor.
1. our requirement 3 x 1Gbps RGMII ethernet port for simultaneously…
Part Number: DRA821U-Q1 Tool/software: Hi Team, here is Jitendra.
we require 32bit Microprocessor having 3 ethernet ports each 1Gbps, 1 CAN2.0B or CAN FD, 7 UART, these are primary features. please don't suggest DRA, AM & TDA series below link, i already…
Hi,
Dongwang Kim said: Lane 3 : RGMII
RGMII doesn't require any serdes lane
Dongwang Kim said: Lane 2 (USXGMII) and Lane 3 (RGMII) can both be used as native Ethernet interfaces .
Yes this is possible
Dongwang Kim said: It is possible to use…
Part Number: DRA821U-Q1 Tool/software: DRA821U-Q1 can boot from OSPI of MCU, or eMMC of main Domain,
Q1: how can it boot for OSPI of MCU then switch to Linux OS which is in eMMC?
Q2: for a blank PCBA, OSPI is blank, eMMC is blank, how can I get…
