Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821 Tool/software: SERDES_REFCLK has internal termination 40 - 62.5ohm, how can I disable it?
Part Number: DRA821U-Q1 Tool/software: Hi, We designed DAR821U2-Q1 SerDes 4 Lanes
PCIe Gen3 x 2 lanes
ETH port0 1x lanes
ETH port1 1x lanes
Is any way to config bootup from SGMII Ethernet port?
I see datasheet says boot mode selection from Ethernet…
Part Number: DRA821U-Q1 Tool/software: Hi,
We found the following comment regarding DDR Hardware training in the e2e thread.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1439609/tda4vm-q1-questions-about-tda4vm-ddr-training…
Part Number: DRA821U-Q1 Tool/software:
on TI platform relay on SD card for bring-up bootup and HSM key programing, do we need that for bring-up bootup and HSM key programming?
My design does not have SSD, my understanding is not SD involved bootup…
Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821 Tool/software: Hi,
Can you share the SOC IBIS model ?
I want to simulate the DDR connection?
Thanks
Max
Part Number: DRA821U-Q1 Tool/software: Hi,
datasheet only specified operating junction temperature:
can you tell what the operating ambient temperature ?
Thanks
Max
Part Number: DRA821U-Q1 Tool/software:
Can you help to tell what should be set for these 3 bits in above table?
OSPI: MCU3 = ? MCU4=? MCU5=?
USB: MCU3 = ? MCU4=? MCU5=?
eMMC: MCU3 = ? MCU4=? MCU5=?
or we ignore these 3 bits when we can configure…
Part Number: DRA821U-Q1 Tool/software: We are building samples with DRA821U4T security and non-security parts.
DFU for both SoC same procedures ? no key required, right?
can both of them bootup same way ?
Thanks
Max
Part Number: DRA821U-Q1 Tool/software: Hi,
Q1: how can we get DDR training and calibration result/margin report?
Q2: what is DDR stress test routine?
Q3: all these have to done in U-boot?
Thanks
Max
Part Number: DRA821U-Q1 Other Parts Discussed in Thread: DRA821 Tool/software: How do I enable the RGMII2 connection from the CPSW5G Ethernet switch on the DRA821-Q1 SoC (TI EVM) in U-Boot?