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  • DRA829J: DRA829J

    Part Number: DRA829J is there any discrete solution for powering DRA829J with already available PMIC's

  • DRA829J: What is the minimal configuration for DRA829J

    Part Number: DRA829J We would like to develop DRA829J board without DDR4, we need just ethernet port is that possible

  • DRA829J-Q1: Power Consumption Spreadsheet

    Part Number: DRA829J-Q1 Hello, I am trying to find the power consumtpin spreadsheet for this device. Also, I would like to see if you have IO for the device in spreadsheet form.

  • DRA829J-Q1: power spreadsheet

    Part Number: DRA829J-Q1 Hi, Does this IC have power consumption spreadsheet. Also if there is a spreadsheet form of the device pinout that can be provided? Thank you in advance. Regards, Maynard
    • Answered

  • DRA829J: Power Estimation Tool

    Resolved
    Part Number: DRA829J Hi team, I want to estimate power consumption by DRA829 in several conditions. Could you provide me Power Estimation Tools like TI provides for other processors? Thanks and Best Regards, Junpei Kishi
    • Resolved
    • Answered

  • RE: DRA829J: SBL Boot Timing on DRA829J

    Resolved
    Hi JUN, It should be around 20ms, ie PORz to SBL main. Do you see similar numbers with this POST setting? Regards, Brijesh

  • DRA829J: DRA829J: Plan for SPI MCAL to support multiple job in the sequene or even multiple channels.

    TI Thinks Resolved
    Part Number: DRA829J Hi TI expert According to the SPI MCAL Limitations of the SPI MCAL driver, It violates AUTOSAR [SWS_Spi_00370] and [SWS_Spi_00262] in the following diagram. And It will cause the EEPROM to violate AUTOSAR. Could you please provide…

  • DRA829J: AUTOSAR: CPSW2G MCAL driver integration on MCU1_0

    TI Thinks Resolved
    Part Number: DRA829J Dear Expert. My customer is doing the porting of CPSW2G MCAL driver to AUTOSAR stack. ETH&ETHTRCV should be the modules to port to AUTOSAR, and DMA will be used. there would be work flow like below: Eth_openCpsw -> CpswDma_open…

  • DRA829J: HW ASRC usage without McASP clocks

    Part Number: DRA829J This question is about special usage of the ASRC module in Jacinto 7. Typically, the ASRC is used with McASP's for serial audio I/O and the McASP's determine the clock ration between the output and input domains. However,…

  • RE: DRA829J: CPSW9G serdes4_0 clk src register could not write ， program stuck at sgmii link state check

    Hi Vineet, Thank you for your reply. I tried to run enet_loopback_test and the log is following: ============================= Enet Loopback: Iteration 1 ============================= Enabling clocks! CPSW_9G Test on MAIN NAVSS Enet_open: cpsw9g…

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