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  • DRA829J-Q1: DRA829J-Q1

    TI Thinks Resolved
    Part Number: DRA829J-Q1 Other Parts Discussed in Thread: DRA829J , DRA829 Tool/software: Hai All, How to check GPU usage in an DRA829J which is running on QNX. And also can we check Whether GPU is enabled or not.

  • DRA829J-Q1: PCIe Receiver Detection

    Part Number: DRA829J-Q1 Tool/software: Hello, we are using DRA829J-Q1 as PCIe Root Complex connected to an Artix UltraScale+ as Endpoint. The UltraScale Datasheet states that dynamic switching of the receiver termination mode is required when the remote…
    • Answered

  • DRA829J-Q1: Link to spruil1 rev. D is not working

    Resolved
    Part Number: DRA829J-Q1 Other Parts Discussed in Thread: DRA829 , TDA4VM Tool/software: Hello, the link on page DRA829J-Q1 data sheet, product information and support | TI.com to DRA829/TDA4VM Technical Reference Manual (Rev. D) https://www.ti.com/lit/pdf…
    • Resolved
    • Answered

  • DRA829J-Q1: SPRZ455E issues affecting SR1.0 and SR 2.0, but not SR1.1

    Resolved
    Part Number: DRA829J-Q1 Tool/software: SPRZ455E Table 1-2 states several advisories that were affecting SR 1.0, not affecting SR1.1, and now are affecting SR2.0. (e.g. i2081, i2117, i2179 Can this be correct, as I suppose SR 2.0 is derived from SR 1…
    • Resolved

  • DRA829J-Q1: TPS65941213

    Part Number: DRA829J-Q1 Tool/software: In our design, VBAT_VSYS is typical 12V, converting 12V to VSYS_3V3(typical 3.3V) by a BUCK ic. VSYS_3V3 is the input of TPS65941213. When we supplied 12V to the system, the system powered up, and we reduced the voltage…

  • DRA829J-Q1: Simulation model(s) for PCIe processor clock output signals

    Part Number: DRA829J-Q1 Other Parts Discussed in Thread: DRA829 , TDA4VM Tool/software: Hello TI team, I'd like to simulate the PCIe interface of the processor. I have the required Serdes package S-Parameters (J721E_SerDes_pkg_s-params_v191008), the Serdes…

  • DRA829J-Q1: OSPI interface

    TI Thinks Resolved
    Part Number: DRA829J-Q1 Other Parts Discussed in Thread: DRA829 Tool/software: HI all: Please help confirm the default state of the F19 pin of DRA829 before the motherboard is powered on, thank you. When we measured the waveform, we found that the MCU_OSPI0_CS#…

  • RE: DRA829J-Q1: Issue with DDR initialization (sporadic data change in memory / on the bus)

    Hi Dmitry, I would recommend starting the part swap as described below to see if the issue follows a specific part and/or board. I still also recommend looping in the memory vendor. Kevin S said: Since you have 3 boards failing, would it be possible to…

  • DRA829J-Q1: OSPI CLK signal slew rate

    Part Number: DRA829J-Q1 Other Parts Discussed in Thread: DRA829 Tool/software: HI all： We have measured the CLK signal of the OSPI flash and found that its slew rate is only 0.3V/ns, which does not meet the requirement of 0.6V/ns specified in the OSPI…

  • DRA829J-Q1: PCIe Receiver Detection

    Part Number: DRA829J-Q1 Tool/software: Hello, we are using DRA829J-Q1 as PCIe Root Complex connected to an Artix UltraScale+ as Endpoint. The UltraScale Datasheet states that dynamic switching of the receiver termination mode is required when the remote…

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