• DRA829V: RESETSTATZ T6 pin condition

  

  Arun M1

  Part Number: DRA829V Team, If RESETSTATZ or T6 pin is not used in the design, Is it required to pull down or can i keep that as NC ??

  • 1 day ago
  • Processors
  • Processors forum

• DRA829V: Interfaces condition if unused

  

  Arun M1

  Part Number: DRA829V Hello Team, SERDES,MCASP and few RGMII Interfaces are not used in our application. Can i keep those related pins(REFCLK,TX and RX) floated or we should define some state ?

  • 1 day ago
  • Processors
  • Processors forum

• DRA829V: PRU PWM

  

  Bill Morgan

  TI Thinks Resolved

  Part Number: DRA829V To use the PRU PWM, is it required that software must continually poll and clear this register? IEP_CMP_STATUS_REG

  • 17 days ago
  • Processors
  • Processors forum
Answered

• DRA829V: USB1_RCALIB and USB0_RCALIB resistor values

  

  Arun M1

  Resolved

  Part Number: DRA829V Hello, Can we use 500Ohm 5% for USB1_RCALIB and USB0_RCALIB resistor values, We are not using the same section (USB Interface USB0 and USB1) in our application. Thanks Arun

  • Resolved

  • 5 days ago
  • Processors
  • Processors forum

• DRA829V: Dra829 secure boot

  

  Divyanshu kumar

  Part Number: DRA829V Hi team, For our customer requirements secure boot feature needed for our application. We have following queries about security features of dra829. 1. Does Dra829 have hardware integrity check feature in secure boot. 2. Is there…

  • 16 days ago
  • Processors
  • Processors forum
Answered

• DRA829V: DRA829 Processor - Clock to Output delay value

  

  Meenalochini D

  Resolved

  Part Number: DRA829V Hi, Please share the "Tco - Minimum Clock to output delay" value for the DRA829 Processor pins. Regards D.Meenalochini.

  • Resolved

  • 9 days ago
  • Processors
  • Processors forum
Answered

• DRA829V: DRA829 Processor - EMIF interface - DDR Pin delay

  

  Meenalochini D

  Resolved

  Part Number: DRA829V Hi team, We were using DRA829 processor and LPDDR4 interface for our design. We would like to know the pin delay details for LPDDR4 routing and SI simulation. Request you to provide the details. Please share your recommendation for…

  • Resolved

  • 10 days ago
  • Processors
  • Processors forum

• DRA829V: Secure boot

  

  lakshmanan balasubramanian

  TI Thinks Resolved

  Part Number: DRA829V Hi Team, We are planning to use TPM chip for secure boot through SPI and we planning to connect it to Main domain. Is it ok or we have connect it to MCU Domain. Thanks & Regards Lakshmanan. B

  • 1 month ago
  • Processors
  • Processors forum
Answered

• DRA829V: DSI, MLB, CSI, USB, UFS Interfaces condition if unused

  

  Arun M1

  Resolved

  Part Number: DRA829V Hello Team, In our design, DSI, MLB, CSI, USB, UFS Interfaces are not used in our application. Can i keep those related pins floated or we should define some state ? Thanks, Arun M

  • Resolved

  • 2 days ago
  • Processors
  • Processors forum

• DRA829V: eDP pixel clock

  

  Bill Morgan

  Part Number: DRA829V What register in the J7 processor can I check to measure the pixel clock frequency that is sent out over eDP?

  • 1 month ago
  • Processors
  • Processors forum

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