Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829 Tool/software: Hi Expert,
customer want using the DRA829 as ethernet switch EE. customer have below question we need your support to answer.
We need 2 lanes of PCIe to communicate with the…
Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829 Tool/software: Hi expert,
Our customer is using DRA829 SGMII connecting to PHY DP83TG721-Q1. The SGMII eye width of Jacinto is 5pS. But the PHY need 200pS. Could you please check the huge…
Part Number: DRA829V-Q1 Tool/software: Hi expert,
Our customer is checking the MMC timing. But they found the actual HS9 is about 4.8ns which is larger than the spec. Could you please help to check if we can adjust? Thanks
The eMMC has been been to…
Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829 What is the power consumption range for DRA829V-Q1 subsystem with followings?
8GB DDR SDRAM
64MB NOR flash
PCIe Gen3x2 lanes SSD
32GB eMMC
Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829 Tool/software: Hi expert,
Our customer would like to know if DRA829 can support UFS2.2? If not, do we have plan to support that in the future? Thanks
Best Regards,
Xingyu Zhu
Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829V Dear Expert,
I just want to confirm if we can support 1 lane for PCIE interface ? Need your help to check and give your confirm.
Also pls comments on 2 lane and 4 lane . Thanks !
Regards…
Hello Fenghua,
We do not offer the PTPS65941310RWERQ1 as it was a stop gap for designs while we transition to newer designs.
We recommend using TPS65941213 as a replacement: User's Guide for Powering DRA829
BR,
Nicholas
Part Number: DRA829V-Q1 Hi,
I am trying to use mtdoops, but the panic_write functionality is missing.
In kernel cmdline I have this:
mtdoops.mtddev=8
During bootup: kernel: mtdoops: ready 0, 1 (no erase) kernel: mtdoops: Attached to MTD device 8
Then…
Part Number: DRA829V-Q1 Other Parts Discussed in Thread: DRA829V
Hi,
We need to configure a DRA829V GPIO as a Reference Clock to 40MHz that will clock an external device.
Is that possible and if so which pins should then be configured as a 40MHz reference…
