Part Number: DS110DF410 In chapter 8.5.16, it is described that output polarity can be inverted by setting 0x1f - bit 7, but register map 0x1f - bit 7 is RESERVED. Which one is true?
Part Number: DS110DF410 Hi team,
Do we have the Vp-p data requirement with the device DS110DF410SQ_NOPB for QSGMII signal? The datasheet only have the 10G signal data. Thanks.
Part Number: DS100MB203 Other Parts Discussed in Thread: DS110DF410 Dear TI Team:
We have DS100MB203 in our design for 10G-KR mux application,
1. Pls review the SCH attached,Thanks
2. In datasheet, There are three functional mode,Pin control mode, SMBUS…
Part Number: DS110DF410 Hi,
The datasheet of the device notes that for master mode programming , the EEPROM must support fSDC greater than 400khz (page 7 note 5). but at the electronic characteristic table it is noted that the typical rate is 400khz.
my…
Part Number: DS110DF410 Hello,
Our customer wants IBIS-AMI Model for DS110DF410.
We are requesting IBIS model by the following Request Process. www.tij.co.jp/.../snlm143.pdf
But there is no answers yet.
Is there IBIS-AMI Model for DS110DF410?
Best Regards…
Part Number: DS110DF410 Hello
I need your help to set all the 4 channels of the DS110DF410 in BYPASS mode
Do i do it by setting the output signal seletct to Raw Data?
If not wat is the way to configure the device to work at BYPASS mode?
How can i see…
Part Number: DS110DF111 Other Parts Discussed in Thread: DS100DF410 , , DS110DF410 , DS125DF410 , DS125DF111
Hello
I can use SMBus read register.
I refer to "DS110DF111, DS125DF111, DS100DF410, DS110DF410,and DS125DF410 Programming Guide"
2.4.1…
Part Number: DS110DF410 this quad channel can recognize PRBS signal from any one of quad channels?
meaning channel1 TX generates PRBS, and channel2 or 3 or 4 RX can detect PRBS from channel1 if loop backed?
Part Number: DS110DF410 Hi,
After CDR has unlocked by exceeding lock temperature range, 90C, if the temperature returns to ordinary, does the CDR re-lock automatically?
Best Regards,
Toshiyuki