Part Number: DS250DF410 Hi expert,
May I have your help on below question?
Do you have any design guides, reference schematics/layouts, or layout guides that you can provide?
2. According to the datasheet, the external EEPROM I²C address must…
Part Number: DS250DF410 Tool/software: Hi Drew,
In the datasheet some example values are given, but it doesn’t mention how to calculate other pre/main/post tap/cursor values. Please let us know how to do that.
Below is the snapshot from the datasheet…
Part Number: DS250DF410 Other Parts Discussed in Thread: LMK04832 , Tool/software: I am interested in using the DS250DF410 for PRBS testing at 25.78125GHz in a 3U VPX Backplane. My plan is to design a 3U VPX Plug-In Card that will contain a DS250DF410…
Part Number: DS250DF410 Tool/software: In the Data Sheet, I see that "Each" Differential Rx Input has a 100Ohm Termination:
In the Pin Function Description is states the following:
The Receiver Input Specifications are also shown:
Question…
Part Number: DS250DF410 Tool/software: Hi,
One of my customer is currently working on capturing the eye diagram for Channel 0 using the internal eye monitor feature available in the SigCon Architect GUI. The setup we are using is as follows:
Transmitter…
Part Number: DS250DF410 Tool/software: Dear TI,
I am looking for IBIS AMI model for this part. The model i downloaded from the server have NC models at TX and RX pins can you help me to get IBIS AMI model for this
Part Number: DS250DF410 Tool/software: I’m planning to use three DS250DF410 retimers to handle 12 differential channels at 25 Gbps each (4 channels per device).
I have a few questions:
Can I use all three devices together on the same board without…
Part Number: DS250DF410 Tool/software: Hello, My customer has questions about CDR reset.
Q1: To reset CDR, write 0x0C to channel register 0x0A. To release CDR from reset, write 0x00 to channel register 0x0A. Is this understanding correct? Q2: From writing…
Part Number: DS250DF410 Tool/software: I have multiple DS250DF410 devices on my board and the SMBUS_ADDR1_JTAG_TRST pin is tied to a 1K pull-down to ground for SMBus addressing. This would set the SMBus address for the device during normal operation.…
