Part Number: DS64BR401 Hello, I'm thinking about using the DS64BR401 Repeater for PCIe, sRIO and SGMII. I have 2-PCIe lanes, 4-sRIO lanes and 3-SGMII lanes. This device has 4-TX lanes and 4-RX lanes. Is it okay to mix the protocols on the chip? For example…
Hi Gary,
Here are some viable options for SGMII:
DS25BR100
DS25BR110
DS25BR120
DS64BR111
DS64BR401
The DS64BR401 may be preferable due to higher channel count.
Thank you,
Evan
Part Number: DS64BR401 Hi Team,
Please allow me to ask you about DS64BR401 EQ DEM gain setting.
By default, DEM register is set as 0x03, however, DEM gain is not listed in the description column. What would be the DEM gain for the default register value…
Part Number: DS64BR401 Hi Team,
Please allow me to ask you about DS64BR401 EQ gain settings.
There is a gain table in the datasheet, however, the table is separated based on "GST" register settings.
When used in Pin Mode, can we ignore this…
Part Number: DS64BR401
Hi Team,
Since below post were LOCKED, I made a new post.
e2e.ti.com/.../242187
e2e.ti.com/.../2259526
Regarding the answer in above post, I understand you could keep the unused input floating. However, if customer wants to avoid…
Part Number: DS64BR401 Hi Team,
I want to extended our 3 x PCIe Gen1 over 5 -10M outdoor cable
Please share the options (as I snla212.pdf attached and advice regarding lightning protections.
Thanks,
Shlomi
Part Number: DS64BR401 Other Parts Discussed in Thread: TINA-TI , Tool/software: TINA-TI or Spice Models Hi,
Our customer requests us a H-SPICE model for DS64BR401. How should we get it?
Best Regards, itabi
Part Number: DS64BR401 Hello,
My customer has a question about DS64BR401.
[Q]
Please tell me the termination method for unused input (IA_x+/-, IB_x+/-) / output (OA_x+/-, OB_x+/-) pins in pin mode.
They can not power down the unused channels in pin mode…