Part Number: DS80PCI102EVK I have a customer that wants to mount a DS80PCI102EVK in a test fixture. They are looking for the dimensions of the two mounting holes on this board and the distance between them. Preferably I'd like to give them a complete mechanical…
Part Number: DS80PCI102 Which is better Tie VDD_SEL = 0 with "1k" ohm resistor to GND or Tie VDD_SEL = 0 with "0" ohm resistor to GND ?
Refer to Datasheet(SNLS344G) described "Tie VDD_SEL = 0 with "1k" ohm resistor to GND" in page 37…
Hi Swetha,
The User Guide has a schematic of the DS80PCI102.
www.ti.com/.../ds80pci102evk
For EQ and DEM I recommend staying within the following range in PCIe Gen2 or Gen3 applications.
EQ: Pin settings from datasheet (Level 1 - Level 5)
DEM: Pin setting…
Hi Abhijit,
We do not have a reference design of your exact situation, but we do have the DS80PCI102EVK available that you can refer to when making decisions about recommended pin connections and routing:
www.ti.com/.../ds80pci102evk
If you have a…
Hi Kamal,
Do you by chance have a DS80PCI102EVK board available for eval?
First, please check out the DS80PCI102 datasheet and DS80PCI102EVK documentation for information about how to set up the device in SMBus slave mode so that you can access the registers…
