Part Number: DS80PCI402 Tool/software: Dear Team,
My customer has evaluated the DS80PCI402SQE on their board. They would like to have the Pin-to-Pin short test results of the DS80PCI402SQE. If you have it, please send it to me.
Best Regards,
Koshi Ninom…
Part Number: DS80PCI402 Tool/software: Hi, Dear supporter,
I am using DS80PCI402 to boost a 2x PCIe connection. If I using pin mode, set pin state as following, the EP device can be enumberated by host.
ENSMB
1K to GND
EQA[1:0]
1K to GND…
Part Number: DS80PCI402 Tool/software: Hello,
the datasheet states that even in 2.5 V mode, all 4-level inputs that have a connection to "logic 1" must be connected to VIN (3.3 V).
Is this correct, or can the pull-ups also be connected to 2…
Part Number: DS80PCI402 Tool/software: Dear Team,
please review the attached schematic from Bosch based on DS80PCI402.
Best Regards Matthias
STR_Nessy31_Main_0989k01_DS80PCI402.pdf
Part Number: DS80PCI402
hi there
We are designing long PCIe3.0 x4 trace on three PCB boards as backplane architecture as below ( snapshot from datasheet ). Trace length on each board is about 10cm ,so 30cm total.
BUT Ti mentioned in this post ( https…
Part Number: DS80PCI402 I would like to perform a circuit simulation by changing the emphasis and equalizer settings using the DS80PCI402 IBIS-AMI model, but how should I use it in the simulator?
Part Number: DS80PCI402 Hello, My customer uses DS80PCI402 at 3.3V supply voltage. They directly connect VDD_SEL to GND now. However, they noticed that the datasheet says “Tie VDD_SEL = 0 with 1-kΩ resistor to GND” at 3.3V mode operation. What could…
Part Number: DS80PCI402 Hello, My customer is considering to transmit PCI Gen1 data from FPGA#1 to FPGA#2 via 1m length FR4 PCB trace. Just one DS80PCI402 is good enough to compensate the 1m FR4 PCB trace loss? Or two DS80PCI402s should be cascaded? …