Part Number: DS90UB960-Q1 Hi team,
What is back channel speed when paired with 935 and 935 works at CSI-2 no-sync mode? It must be 10Mbps? Can it be 50Mbps?
Thanks!
Jiawei
Part Number: DS90UB960-Q1
Dear Team,
We are using DS90UB960-Q1 n our design. The layout guideline says ". Minimize intra-pair and inter-pair length mismatch within a single CSI-2 TX Port (recommended <= 5 mils)."
Our layout team is not…
Part Number: DS90UB960-Q1 Hi Team,
Could you please kindly help to provide those register address which could help customer recognize if the input data from camera is correct, and if those register could recognize which input channel has errors, for example…
Part Number: DS90UB960-Q1 Dear Team,
I am interfacing DS90UB960 with SC206E.
In my board DS90UB960 is placed in top and SC206E is placed in bottom. Please see the below image
Below is the enlarged version of CSI0 interface. The yellow color signals are…
Part Number: DS90UB960-Q1 Hi,
I want to work with the following setup-
What the virtual ID I'll be at CSI1?
The test pattern (953) ID is VC3.
Thanks
Shmuel
Part Number: DS90UB960-Q1 Dear Team,
Could you please send us the mechanical dimensions of DS90UB960-Q1.
Mechanical details are missing in the datasheet.
Our pcb layout team need it.
Regards
HARI
Part Number: DS90UB960-Q1 Hi,
Here is a description from Datasheet Page166.
"The VPOC noise must be kept to 10 mVp-p or lower on the source / deserializer side of the system. The VPOC fluctuations on the serializer side, caused by the sensor's transient…
Part Number: DS90UB960-Q1 Other Parts Discussed in Thread: TDES960 Hello, I'm designing a board using the Quad deserializer for FPDLink (DS90UB960-Q1) and I cannot seem to find the package drawing for that IC. The datasheet for the V3Link counterpart…
Part Number: DS90UB960-Q1 Hi,
POC use several inductors to provide a high impedance over a wide frequency range. Could you tell me what is the minimum impedance that should be reached up over the whole bandwidth? Or it is different at different frequency…