Part Number: LMH0071 Hello team,
I have a question about RXCLK.
If the output of the signal generator is input to RXIN0 when it is not settled, does it affect the frequency output from RXCLK?
The details of the question are as follows,
Good…
Part Number: LMH0071 I have taken the FPGA IP for deserializer and found it is 20-bit data interface where data from IC is 10-bit. I'm using it for SMPTE-259M-C, i.e.., SD SDI standard capture. Again is there any way to use it for 10-bit and also how…
Part Number: LMH0071 In LMH0071 datasheet, it is mentioned that TI will provide FPGA IP.
Does TI provide FPGA IP for LMH0071 deserializer? If yes, where can I get it?
Part Number: LMH0071 In the datasheet with reference to TABLE 1 , does the cross mark refer to features available for the particular part number or not.
Part Number: LMH0071 Other Parts Discussed in Thread: LMH0340 , LMH0341 , LMH0070 I've compiled the Altera fpga code ( NSM_SINGLELINK ) but it's made for a CycloneIII and I've got a NAX10 so I don't know if I've mistranslated the PLL or desializer or…
Hi Nasser,
I am only concerned with the minimum RXCLK transition to RX data transistion (tDVAC) wich is 650 ps because in the FPGA side point of view, in case that the tDVAC is 650 ps coming out from LMH0071, the board skew + FPGA internal input skew…
Other Parts Discussed in Thread: LMH0071 Hi,
Please let me know how the unused differential inputs of LMH0071 must be properly terminated? Is it fine if both the pins of the pair are connected to ground?
Regards,
Prachi
Other Parts Discussed in Thread: LMH0071 Hi all,
I have a bad experience using LMH0071 chip in receiving DVB-ASI signal in continuous mode, I want you to tell me is there any thing wrong in my work or this is really the device's limitation which is…
Ramin
I would suggest staying with the LMH0071, and working around the DVB-ASI issues with IP in the FPGA. There is some enhanced DVB-ASI support code here: http://www.ti.com/tool/broadcast_video_serdes_ip
Mark Sauerwald
