Part Number: MSP430F5335 Dear Sirs
I will be using the MSP430F5335 in a new design. I have, in the past, used the TIVA family of uC. One of the tings that made working with the TIVA was the "TivaWare Peripheral Driver Library". Is there such…
Part Number: MSP430F5335 Other Parts Discussed in Thread: ADS1261 Dear Sirs
I will be using the SPI interface for my communications. The MSP430F5335 list four SPI channels, USCIA0, A1, B0 and B1. USCIA0 and B0 are available on P2 by port remapping and USCIA1…
Part Number: MSP-FET Hi,
When we are trying to use the MSP-FET debugger we are getting the following error -
"Fatal error: Failed to re-initialize Session aborted!"
Please find the below screen shot.
In the debugger window I am getting the…
Hi Merril,
Newman said: How can I use DSLite scripter in UniFlash to force MSP430 into 4Wire JTAG mode w/ TEST/nRST?
DSLite uses settings found in the device-specific .ccxml file. You used to be able to specify the JTAG mode in the target configuration…
Part Number: MSP430F5335 Other Parts Discussed in Thread: MSP-TS430PZ100C Hellow,
I have some questions about RTC.
*DVCC=3.3V, Reset Pin(96pin) is pulled up 47k, and conected to GND through capacitor.
(MSP430™ Hardware Tools.pdf Figure B-68. MSP…
Part Number: MSP430F5335 Hi,
Would you please teaching me about RTCCTL2 Register setting value.
There is the explanation about RTCCALS & RTCCAL in slau208q.pdf.
Q1. If setting value is RTCCALS = 0 and RTCCAL= 1 , Is the result -6ppm (=-4ppm + (-2ppm…
Part Number: MSP430F5335 Hello,
Customer is referring a chapter of Real-Time Clock Calibration in User's Guide slau208q. When writing the RTCCTL register in the calibration sequence, is there any order to be followed on writing bits between RTCCALS…
Part Number: MSP430F5335 Dear member,
Immediately after returning from backup operation (battery operation) (immediately after main power supply) __bis_SR_register (GIE); A phenomenon that has not progressed since then has occurred. An unintended interrupt…
Part Number: MSP430F5335 Hi,
I'm working with a design where LDOO is supplied externally. LDOI is connected to GND and internal LDO is disabled. It turned out that LDOO draws tens on mA's current even though it is powering only IO.
Is there someting…
