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  • MSPM0G3507-Q1: External Crystal requirements

    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: SEGGER , UNIFLASH Tool/software: Hi guys, we build a new prototype board with MSPM0G3507-Q1. We want to use an external 24 MHz crytal. I did not saw any requirements for the choice of the crystal…
    • Answered

  • MSPM0G3507-Q1: OPA_IN1NEG and ADC12_0_C2 sharing the same GPIO_PIN24

    Resolved
    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Hi Champs, The customer has configured their sysconfig settings in such way that both functionalities are mapped to the same pin: #define GPIO_OPA_0_IN1NEG_PIN …
    • Resolved
    • Answered

  • MSPM0G3507-Q1: Measure VDD and VCORE internally

    Resolved
    Part Number: MSPM0G3507-Q1 Tool/software: Hi TI Team, I found a statement in the documentation that the MSPM0, see below. Is it possible to to monitor he supply voltage? To measure internally VDD and VCORE. Thank You!
    • Resolved
    • Answered

  • MSPM0G3507-Q1: Current consumption

    Resolved
    Part Number: MSPM0G3507-Q1 Tool/software: How do I estimate the current draw of this microcontroller?
    • Resolved
    • Answered

  • MSPM0G3507-Q1: LDO regulator

    Resolved
    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: TPS746-Q1 , TPS7A47-Q1 , TLV767-Q1 , TPS7A47 Tool/software: I am looking for a LDO that will power the M0G3507 Microcontroller. Input power is 5V from a LM5085Q. I am considering these parts: TPS7A47…
    • Resolved
    • Answered

  • MSPM0G3507-Q1: External voltage reference

    Resolved
    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: SYSCONFIG Tool/software: The technical manual slau846b states: Be sure the VREF reference buffer is disabled by clearing the ENABLE control bit in the CTL0 register before applying the external…
    • Resolved

  • MSPM0G3507-Q1: SPI in 3-Wire mode with shared PICO and POCI wire

    TI Thinks Resolved
    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Hi guys, i have the following 3-wire configuration The PICO and POCI wire is shared, because the slave just a common IO SPI wire. Is this configuration possible because…

  • MSPM0G3507-Q1: Arm Cortex-M0+ (IEC 60730)

    Part Number: MSPM0G3507-Q1 Tool/software: Hello everyone, I am looking for an Arm Cortex-M0+ that includes IEC 60730 Can anyone help me with this? Greetings Mathias

  • MSPM0G3507-Q1: SPI communication DRV3901-Q1

    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: DRV3901-Q1 Tool/software: Good day, colleagues, My customer uses the MSPM0G3507-Q1 and DRV3901-Q1 and have the problem that a maximum framesize of 16 bits can be configured in CCS. But the DRV3901…
    • Answered

  • MSPM0G3507-Q1: HFCLK_IN to CPUCLK and MCLK in RUN0 mode

    Resolved
    Part Number: MSPM0G3507-Q1 Other Parts Discussed in Thread: SYSCONFIG Tool/software: I am using an external crystal oscillator which is input on HFCLK_IN. How is this clock setup and divided to be used as the MCLK & CPUCLK in RUN0 mode? Should this…
    • Resolved

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