Part Number: SN65DSI83-Q1 Hello team,
I have some questions about using external cap controlled EN in Figure 7.
It looks capacitance depends on slew rate of VCC supply. How to estimate the capacitance?
How to do 8.3.5 Initialization sequence or…
Part Number: SN65DSI84-Q1 Other Parts Discussed in Thread: SN65DSI83-Q1 , Hello,
Regarding my ticket: https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1618174/sn65dsi84-q1-tft-lvds-module-1280-w-x-rgb-x-800-h-compatibility
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Part Number: SN65DSI83-Q1 Other Parts Discussed in Thread: SN65DSI83 Hello, In our appliance we use a SoM. For LVDS generation the TI SN65DSI83 is uses. It seems to be working fine, images and video's are visible on a 1280 x 800 display. At a EMC pre…
Part Number: SN65DSI83-Q1 Other Parts Discussed in Thread: SN65DSI83 , Hello everyone,
We are using SN65DSI83 to convert DSI signal (produces by cm4) to LVDS signal for our display panel. We use 75 MHz external clock source to produce the lvds signal…
Part Number: SN65DSI83-Q1 FPD Link Team,
customer is facing an issue w DSI interface of SN65DSI83TPAPRQ1. The static image sent to the display is losing vertical sync. In the Bridge mode (test mode), which disables the DSI and sends veritcal bars in…
Part Number: SN65DSI83-Q1 We are integrating the SN65DSI83-Q1 MIPI-DSI to LVDS bridge with a portrait 800×1280 LVDS panel on a Custom platform. Linux kernel version used is 4.19 and using backported driver from linux version 5.14.
Observed Behavior…
Part Number: SN65DSI83-Q1 Tool/software: I have AW200Z ( The AW200Z series is Quectel’s new generation of multi-mode LTE Cat 4 smart module, Based on Qualcomm 64-bit quad-core Cortex-A53 processors with built-in Adreno TM 702 GPU ). I would like to configure…
Part Number: SN65DSI83-Q1 Other Parts Discussed in Thread: SN65DSI83
Hi Team,
I'm working with the TI SN65DSI83 DSI-to-LVDS bridge on Linux platform (kernel 5.10.168) arm64. I couldn't find a suitable driver for this kernel version.
Could you please…
Part Number: SN65DSI83-Q1 Hi Team,
Since the LCD-side frequency range is 23–27 MHz (typ. 25 MHz), we are planning to use the LVDS pixel clock at the lower limit of 25 MHz. We intend to connect a 25 MHz external crystal to `REFCLK`.
I have two questions…
Part Number: SN65DSI83-Q1 Other Parts Discussed in Thread: SN65DSI83 Dear Texas Instruments Support Team,
We are currently working on the STM32H747 controller using the MIPI DSI interface in video mode .
In our setup, we are using the SN65DSI83TPAPRQ1…
