Part Number: SN65DSI84-Q1 Hello TI experts,
my customer wants to use SN65DSI84-Q1 as single-link LVDS.
LCD module has 1280x480(RGB) resolution and LVDS24(8x3) bits VESA interface.
1. About firmware, we will set LVDS_LINK_CFG as 1, to set single-link LVDS…
Part Number: SN65DSI84-Q1 Hi Team,
My customer is using DSI83-Q1 and DSI84-Q1 in their two applications. Now they want to use test pattern to do the measurement.
First, they used external DSI to bring the panel by using DSI83/84. (Android OS)
Second…
Part Number: SN65DSI84-Q1 Can TI provide more information on the characteristics of the RX equalization?
The only mention I see in the datasheet is in the register description which just says 1db or 2db, but doesn't mention at what frequency that 1db…
Part Number: SN65DSI84-Q1 Hello All,
Thank you for your time for checking my question first. :) Want to check if this DSI to LVDS family support frame rate control (FRC) or called dithering? Because I can't find the relative sentence in datasheet, if…
Part Number: SN65DSI84-Q1
Hi Team,
Some DSI bridge questions as below, please help. Thank you.
1. How to decide this REG 0x0B DSI_CLK_DIVIDER setting parameter?
2. How to decide this REG 0x12 parameter?
3. Does the chip have SSC function?
Regards…
Part Number: SN65DSI84-Q1 Other Parts Discussed in Thread: SN65DSI84 , , DSI-TUNER Hello TI support team, currently we are working on a new design where we integrated SN65DSI84-Q1 and have some issues with I2C configuration of SN65DSI84 adapting to our connected…
Part Number: SN65DSI84-Q1 Hello Sir:
We are not familiar on SN65DSI84-Q1, would you please help us to check our initial processes as below.
If there has any wrong processes, please let us know.
Thanks a lot.
1. set EN pin to low
2. mdelay(10) ms
3.set…
Part Number: SN65DSI84-Q1 Hi team,
My customer has encountered a strange issue:
During the eye-diagram test, the LVDS output 0 and output 1 have very poor eye-diagram which are NG:
The strange thing is the output content is normal without issue and here…