Other Parts Discussed in Thread: SN65LVDS1 Hi -
I am using the SN65LVDS1 driver unit to send a clock signal to an ADC. Prior to plugging up the ADC to the LVDS1 unit, I was testing the output of the LVDS driver unit and am seeing a 600mV output across…
Hi Jongwoo,
Is this similar to: LVDS Repeater 1x input / 2x output? If so, please see SN65LVDS1 (1 single-ended input, 2 differential outputs), SN65LVDS2 / SN65LVDS4 (2 inputs, 1 output), SN65LVDS18, (1 single-ended input, 2 differential outputs) and SN65LVDS19…
Other Parts Discussed in Thread: SN65LVDS2 , SN65LVDS1 Hello!
Is it possible to use SN65LVDS1 and SN65LVDS2 as a driver and receiver for AES/EBU and SPDIF digital audio signals?
If Yes, then please advise some kind of reference design if there exist one…
Hi Manoj!
Thanks for your answer.
Could you please explain this noise issue a bit?
Can I overcome this noise issue if i use LVDS driver like SN65LVDS1? To reduce a clcok pin would significantly reduce the BOM cost where signals transfered with differntial…
Other Parts Discussed in Thread: SN65LVDT2 , SN65LVDS1 I have a question about the SN65LVDS1 and SN65LVDT2
specs.
What is the amount of
additive jitter going through the level translator to/from LVDS?
Esp. at 25MHz
Hi Greg,
Since coupling is dependent on the spacing between lines, we will need to know what the spacing is between the single-ended and differential signals in your customer's application.
If you can provide the layout files, as well as some more…
Hello I.K,
Let me confirm about below.
Q2. Is it possible to connect GND for input of SN65LVDS1 ?
Previously, you said that this case is OK, but let me confirm about detail.
* Can I connect input of SN65LVDS1(D+) to GND directly or should insert pull…
Other Parts Discussed in Thread: SN65LVDS2 , SN65LVDS1
Do the SN65LVDS1,
SN65LVDS2 LVDS devices have requirements on the MAXIMUM input rise (and fall)
times?
Some application notes
state that long rise/fall times may lead…
