Part Number: SN74AHC8541
Tool/software:
Hello E2E Experts,
Good day.
Is there a single-chp solution that performs similarly to the schematic below?

That is a 1-Bit Register, with Read (On Clock), Write, Clear and Invert.
Regards,
TI-CSC
Part Number: SN74AHC8541
Hi Sir,
May I have your help on following question from my customer?
1. Please refer SCH from customer, when the Host pull low, SN74AHC8541 output be pulled low to reset other device, is there any concern that SN74AHC8541 will be damaged by discharge current from C5? (Please be noted that R5, R6, C6 and 66ohm can't be changed)
2. May I know what the definition of Low-level output current? What is the Y pin current-sinking capability when output pull-low?
3. May I confirm with you that there is push-pull circuit inside the Y pin to control the high/low? What resistor value of Y pin during pull-low status?
Thank you.
Edward Chen
Part Number: SN74AHC8541
Hi Team,
I have a question at SN74AHC8541.
Is there a protection circuit in Y pin? For example, ESD protection circuit.
If there is a protection circuit, is it VDD or GND? Or both?
If the Ypin is broken, is it open or short?
Best Regards,
Ishiwata
Part Number: SN74AHC541
Hi. Team.
I’m using SN74AHC541N , SN74AHC8541N , SN74HC273N and SN74AHC273PWR.
I have some questions to undershoot of VI and VO.
The undershoot may be exceeded -0.5V in the application. which exceeding abs max rating of VI and VO.
Each devices datasheet say “The input and output voltage ratings may be exceeded if the input and output current ratings are observed.” .
So I believe each device can exceed -0.5V as long as IIK and IOK are lower than -20mA and ±20mA respectively.
It is my understanding. correct?
If so , could you advise damping resistor value to suppress the current for each devices?
Thanks.
Regards,
Tsuyoshi