Part Number: SN74AUP1T04 Other Parts Discussed in Thread: SN74LVC1G17 , TXU0101 Hello TI experts,
My customer is looking for level shifter for the output of OP amp.
the OP amp is ADI's, AD8029AKSZ, its speed is 125MHz,
output is 5V and 0V. customer…
Part Number: SN74AUP1T04 The SN74AUP1T04 is only offered in the 3K reel (R suffix on the orderable part number). Are we moving away from offering devices in the logic family in 250 pcs reels? (T suffix on the part number)
Other Parts Discussed in Thread: SN74AUP1T14 , SN74AUP1T04 Hi,
The titles of the datasheets of SN74AUP1T04 and SN74AUP1T14 differ by Schmitt-Trigger input, but the description in the datasheets both mention Schmitt-Trigger. Can you clarify the difference…
Part Number: AFE5803 Other Parts Discussed in Thread: SN74AUP1T04 , , ISO7240M According to Table 12 of the AFE5803 datasheet, the ADC SPI output is powered from DVDD (1.8V). Following Figure 58, there is also a note saying that the "SN74AUP1T04 can be…
Hello Yusong,
What are the voltage levels from the second source?
You can consider using a signal NFET (or inverter similar to SN74AUP1T04 ) to invert RSTSENSE signal and shutdown the 2nd TPS2663x for second source [when first/main source is powering…
Hi,
How are you?
If the customer concerns about when using multiple AFE5808A devices for SPI controls,
yes, please take a look at the following Datasheet link:
so the customer can use and receive one control for using multiple chips.
AFE5808A…
Thanks for checking with us!
for the JESD operation, recommend LMK0482x family.
in our datasheet, we also have the below recommendations:
13.1 Documentation Support 13.1.1 Related Documentation CDCE72010 Data Sheet, SCAS858 CDCM7005 Data Sheet…
Hi,
Since your question is related to the you
connect the SDOUT signal with your FPGA with LVCMOS2V5 voltage level.
We suggest you can refer to AFE5809 datasheet's Page 49.
in your case: Level sifter SN74AUP1T04 can be used to convert 1.8V logic…
Hi Lakshmanan,
For AFE5809 device's LVDS output circuitry,
please take a look at the data sheet Figure 81. Equivalent Circuits of LVDS Outputs (on page 47).
Its LVDS data directly DC outputs sent to your FPGA (for example).
However, please also…
VT- max and VT+ min can over lap. The Hysteresis is still guarranteed. If the VT-max is on the upper end then the VT plus will be at least the VT- plus the hysteresis min.
The important values are VT-min and VT+ max. These are your Vil and Hih levels…
