Part Number: SN74LVC1G3157 Other Parts Discussed in Thread: SN74LVC2G157 Tool/software: Hi Team
may I know what is the different between analog switch and MUX ?
could you share any comparison for topology and application. If you have any document…
Part Number: SN74LVC2G157 I'd like to simulate circuit with SN74LVC2G157DCUT, used in an new design and need PSpice model or other kind of model with which I can simulate it by Tina or LTspice.
Can you share such model to me?
Thanks
Part Number: SN74LVC2G157 Other Parts Discussed in Thread: SN74AUC2G08 , SN74AUC1G04 , SN74AUC1G32 Tool/software: Hi Team,
I’m looking for a suitable 2:1 multiplexer that meets the following requirements:
Supports 100 MHz CMOS/LVCMOS signals.…
Part Number: SN74LVC2G157 I want to use the SN74LVC2G157 to select between two clocks and I want to know what the max clock rate is for an input to the device. The datasheet specs the tpd, but I can't find any clock on the minimum tw, as shown in figure…
Part Number: SN74LVC2G157 Other Parts Discussed in Thread: SN74AHC157 , , SN74HCS157 , TMUX1574 , SN74LV4053A Hi team,
My customer is looking for an 2:1 I2S MUX and I found SN74LVC2G157 and SN74LV4053A .
Are these devices good enough for customer…
Part Number: SN74LVC2G157
Hi Team,
The datasheet of SN74LVC2G157 shows the Tpd between A, B, A bar, G bar and Y or Y bar. Or customer would like to know the time delay between Y and Y bar. Do we have this information?
Regards,
Danilo
Part Number: SN74LVC2G157 Hi. We want to get the SN74LVC2G157DCU with NiPdAu plating only. Is specifying the 74LVC2G157DCURG4 guarantee that we will only get NiPdAu and not tin?
Thank you.
Hi Hidetoshi-san
The SN74LVC2G157 is not a switch. It is a buffered mux. If you have a voltage on any input that is not at Vcc or Gnd it will draw more current.
If it was a switch then it would still draw more current if the control pins are not at…
Other Parts Discussed in Thread: SN74LVC2G157 Hello,
are there any data available regarding the propagation delay variations between these chips. In an existing design there are three of them inserted in different lines of a communication interface…