Part Number: TDA4AH-Q1 Tool/software:
I have a large ONNX model, and I need to replace a specific section of it with another ONNX model. I'm currently stuck and unsure how to proceed. Could you please provide suggestions or guidance on…
Part Number: TDA4AH-Q1 Other Parts Discussed in Thread: TDA4VH Tool/software: When running our proprietary OS on TDA4AH/TDA4VH, CPU exception often occurs. The value of Exception Syndrome Register (ESR) is 0xBF000002, I recognized that the reason of CPU…
Part Number: TDA4AH-Q1 Tool/software: Hi TI, We have a custom board with TDA4AH-Q1 HS SoC and we are trying to boot in XSPI (Mode OCTAL-DTR (8D-8D-8D) at 25 MHz, Pin Cmd 0x0B Read Command, SFDP Disabled).
I need to better understand the low level sequence…
Part Number: TDA4AH-Q1
Tool/software:
Hello TI,
Could you please provide the actual encoding of the LTSSM_STATE field of the LINKSTATUS register ?
I have a gen3x2 link up and active (TDA4AH is the RC, PCIe instance 0), but the LTSSM_STATE reads 0x10…
Part Number: TDA4AH-Q1 Tool/software: Finishing up layout for board, but need to add the pin delay parameters for the interposer for finalization Where do I get this ?
Part Number: TDA4AH-Q1 Tool/software: Asynchronous CPU exceptions occur when using iperf3 in the following operating environments
OS: RTOS developed in-house Core: TDA4AH Board: j784s4_evm Operating core: A72*8 (Ethernet driver runs on core 0) Ethernet switch…
Part Number: TDA4AH-Q1 Tool/software: Hi,
I've try to configure the nor-spi on sdk 10 version, compiling using yocto, here is my dts node: (u-boot dts)
&ospi0 { bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl…
Part Number: TDA4AH-Q1 Tool/software: Hello TI,
We are using 9.2 SDK and fusion 1 board (FPD link III).
I would like to know we should be able to run the Onsemi's AR0233 sensor in the Single cam default demo application with 60 FPS? If so, please…
Part Number: TDA4AH-Q1 Tool/software: The sdk version I used now is ti-processor-sdk-rtos-j784s4-evm-10_00_00_05
When the group is not equal to 1, the simulation inference results of deconvolution in SDK 10.0 are abnormal.
We have also verified that…
Hi,
Scott Brown said: In the function EnetBoard_configSerdesClks, is it necessary to set the Module Parent Clock twice, as the USXGMII and QSGMII rely on different parent clocks? Or is it possible just to use one parent clock?
You need to use two clocks…
