Part Number: TFP410-EP Hi,
I'm wondering if the rise time and/or fall time of the DVI output signals are slower at a lower input clock frequency? Specifically what they would be at single-ended clock IDCK+ of 26Mhz.
I see that at the max clock frequency…
Part Number: TFP410 Hi TI
The customer needs to convert RGB to HDMI, and found this TFP410 to meet their needs. However, the operating range of - 40 ° to 85 ° is not used. TFP410- EP products are restricted materials, and the procurement process…
Part Number: TFP410-EP Other Parts Discussed in Thread: TFP401 Hi
We have questions of TFP410-EP and TFP401.
1. TFP410-EP has HTPLG pin. If HTPLG is logic high, what is output? Also, how about when HTPLG is low?
2. The following is about TFP401 pin tolerance…
Part Number: TFP410-EP Regarding power-distribution-network design, what frequency should I decouple on the board up to? I am currently assuming 200MHz, what frequency will the TFP410-EP decouple upwards from?
Other Parts Discussed in Thread: TFP410-EP , TFP410 Dear, we plan to use TFP410-EP in out project, and we kown that the internal DE generator of TFP410-EP has the limitation for H_RES <= 2047 & V_RES <= 2047. as per SMPTE-274M & SMPTE-296M, the…
Rob
I think the invalidate state of the DVI source is confusing the TFP410 and causing problem with TFP41-EP TX0+/-. Once the data is valid and the TFP410-EP gets reset, the TFP410-EP will latch to the input side and in the correct state.
Thanks
Davi…
Other Parts Discussed in Thread: TFP410 , TFP410-EP Hello,
I noticed that there was an IBIS model for the TFP410 included in this Forum discussion post: http://e2e.ti.com/support/interface/high_speed_interface/f/138/p/56563/829191.aspx#829191
However, I am…
Other Parts Discussed in Thread: TFP410-EP , TFP410 Hello,
In my project I am using TFP410-EP Digital Transmitter, and I am interface this device with FPGA ,
I have gone through the data sheet as per my understanding I am thinking to do simple configuration…
