Hi, Venkatesh,
We are not able to support any wideband queries due to limited resource and collateral. You may search the E2E forum for archived posts of previous discussions which may help address your questions. You may also want to get in touch with…
Hi Andy,
We do not have an IC as a complete AM/FM Radio. The closest thing for this type of design is the AFEDRI8201, to be used in conjunction with a DSP: www.ti.com/product/AFEDRI8201/description , or this Wideband Receiver Ref Design: www.ti.com…
Hello,
Comm Agility Ltd, and Azcom Ltd provide design services and prebuilt designs, I don't think they have a reference design to copy. Being a third party engineering group, you have to contract them for their IP.
The example design is based on…
Hello,
There is no wideband bypass from the JESD Serdes / JESD block to the IQN2 Baseband interface.
While the JESD-serdes can process data this quickly, the DFE signal processing, and IQN2 baseband interfaces can not.
The widest 2 Rx streams - 2…
Hi,
All of our high speed analog to digital converters convert an analog input signal to digital bits. That is what A to D converters do. But our ADC will have requirements on the incoming analog signal, such as the requirement that it be differential…
Hello,
You can run Design 4 in JESD loopback, so no ADC or DAC board is needed, just the 66Ak2L06 EVM.
www.ti.com/.../TIDEP0081
On the EVM, request and download MCSDK 3.1.4.7
request and download RFSDK
On the 66AK2L06 EVM, you can run the RFSDK…
Hello,
The JESD 204B interface is a serdes type interface where the serial data is formed into I or IQ frames, the frames are formed into multiframes. There is not an equivalent write 1 or 0 to this interface. The QMSSS, IQN, DFE, and Serdes are programmed…
Part Number: 66AK2L06 Hi E2E Community,
I'm currently interested in running two 66AK2L06s in parallel with 2 discrete ADCs on each device communicating via JESD.
I have a few concerns about timing and synchronization first between the ADCs and second…
Hello,
In order to run the DFE-66AK2L06/TCI6630K2L, with a JESD-ADC, the ADC output serdes must conform to either Adjacent Market design 1
ADC12J4000, or design 4 ADC32RF80. e2e.ti.com/.../594961
Typically the ADC clock needs to be generated outside…
Hello, Joe.
Is this Design 5?: http://www.ti.com/tool/TIDEP0034
I'm sorry I couldn't see any number among the list under the TI Designs section of the 66AK2L06 page. Actually I don't even know why you call TIDEP0081 "Design 4," too. :)
Anyway there…
