Part Number: TM4C129XNCZAD Other Parts Discussed in Thread: TIDM-TM4CFLASHSRAM We have a new device designed with a TM4C129xnczad using the TIDM-TM4CFLASHSRAM. We are currently using a 24 BPP raster and having issues with our LCD screen updating at a good…
Bump This_Post said: The DoDMA function is reading in data from an external flash using CPU memory, then writing it to an external SRAM using CPU memory, currently I am trying to configure the DMA to do that instead.
Hi,
I think I may have given you incorrect…
Part Number: TM4C129XNCZAD Other Parts Discussed in Thread: TIDM-TM4CFLASHSRAM
So we currently have a device that uses a basic 640 x 480 screen with a raster input. The problem is that we are using an external SRAM as the LCD frame buffer, this is updating…
Other Parts Discussed in Thread: TIDM-TM4CFLASHSRAM Hi Team, Our customer would like to request for the design files of the TIDM-TM4CFLASHSRAM reference design. The files are apparently one of the key factors on the processor selection for their new project…
Part Number: MSP432E401Y Other Parts Discussed in Thread: MSP-EXP432E401Y Tool/software: Hello Team,
As in below image, MSP432 and CPLD are connected. This is done with reference to the www.ti.com/.../TIDM-TM4CFLASHSRAM
In our custom board, we tried…
Part Number: MSP432E401Y I'm currently designing a microcontroller board with MSP432E401Y which uses EPI Host bus muxed mode for interfacing with 3 devices(SRAM, Parallel Flash and FPGA)
To segregate the address and data line, should i add a D-latch…
Hi Lezhong,
I hope based on the feedback from the other posts you were able to continue with the SDRAM example. I will close this one here.
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based…
