Part Number: TMS320C6472 Tool/software: Hi, My customer observes DDR2 access issue on their custom board. The issue is observed one of 5 boards. The test simply writes and reads DDR2 memory region and compares data. When the issue happens, all data mismatch…
Part Number: TMS320C6472 Hi,
Customer is using TMS32C6415EGLZA5E0 but it will be EOL in TI.com.
1. is there pin-to-pin device to replace it?
2. TMS320C6472 seems to be most proper to replace it.
However, it was NRND on 2019 and it is changed to…
Part Number: TMS320C6472 Hi,
Good Day. Is there available manual for linux for TMS320C6472? This is only what we have found.
http://software-dl.ti.com/sdoemb/sdoemb_public_sw/csl/CSL_C6472/latest/index_FDS.html
Thank you very much.
Best Regards…
Part Number: TMS320C6472 I have a customer trying to manually test the HPI interface on the TI TMS320C6472ECTZA6 DSP. Is there a sequence of writes and reads one can use to verify the HPI operation?
Customer can read back the HPIC and HPIA register…
Part Number: TMS320C6472 Tool/software: TI-RTOS Hello,
I have a set of XDC modules which were developed for the C6472, and would like to compile them for functional testing under Linux.
I have attempted to mimic the example from the RTSC-Pedia:
…
Part Number: TMS320C6472 I would like to disable cache for a region of external DDR, 0xEA000000 to 0xEB000000.
Can someone confirm that CACHE_EMIFA_CE10 is the correct constant to use for that region?
This document is confusing about which is correct…
Eli, There is probably (I am not the RTOS expert, but it should be in the documentation somewhere) a counter that keeps track of the 1us count, yes. And if that counter is 32 bits in length, then it will also wrap around to 0 when it passes 0xffffffff…
Part Number: TMS320C6472 Hi,
I am developing media transcoding in TMS320C6472. But our partner suggest us to use TMS320TCI6486. I have read both datasheets. They are the same. Could you tell me what are differences between them? Which is better? What…
