Shankari G said: May be once you receive the hardware
Hi,
What test should I run in order to check if these parameters ( NT5CC256M16ER-EK_DDR3 PHY Calc v11.xlsx ) ok or need to change
Part Number: TMS320C6655 Tool/software: Hi Experts,
Could you please send me the DDR3 Register Calc excel file that used in C6655/C6657 EVM?
i want to verify these parameters which depends to DSP SoC configuration
Part Number: TMS320C6655 Tool/software: Hi,
For my present project, I am developing the custom driver for McBSP peripheral in C6655 device.
1) At present, we were able to set the FS and CLK from McBSP peripheral, as shown below,
2) In our application…
Part Number: TMS320C6655 Other Parts Discussed in Thread: TLV320AIC20K Tool/software: Hi,
We need to configure the McBSP module in the "TMS320C6655" device, for driving the audio CODEC IC "TLV320AIC20K".
As we are new to this configurations…
Part Number: TMS320C6655 Tool/software: Hi,
Thanks in advance,
Today, I tried checking the EDMA module in C6655 device, using the example provided in CSL library, as follows.
Is there any way to resolve this issue?
Regards,
Sivarama Raju
Part Number: TMS320C6655 Tool/software: Im using upp protocol for communication between fpga and c6655 . But im facung an erri error in ypisr register . Which is internal bus error. I think it is due to wrong pll configuration. Can u give some insight…
Part Number: TMS320C6655 Other Parts Discussed in Thread: LM10011 Tool/software: Hi Experts,
I searched at DSP and LM10011 datasheets but didn't find any information regarding VCNTL0-3 (VID) Layout recommendation.
There is any recommended length …
Part Number: TMS320C6655 Tool/software: I'm experiencing an issue that only occurs in low-temperature(-40°C) conditions.
During the execution of the Cache_all function, the cacheReg variable remains set to 1 , causing the while(*cacheReg) loop…
