I would suggest reviewing the datasheet for SM320C6748 along with checking a specific OPN in the Quality, Reliability, and Packaging page:
https://www.ti.com/lit/ds/symlink/sm320c6748-hirel.pdf
https://www.ti.com/quality-reliability-packaging-download …
Part Number: TMS320C6748 Hello community ,
I am trying to execute the "Face Detection Demo" for LCDKC6748 but unable to get the output.I have already installed the related software package and IDE like bios_c6sdk_02_00_00_00_setupwin32 and ccs_setup_5…
Part Number: TMS320C6748 Other Parts Discussed in Thread: XDS560 , OMAP-L138 , 66AK2G12 What is the approximate price for a single dsp kit(development board) 6748??
I have tried to explore the relevant TI pages but i am unable to understand the exact and…
Jack,
These recommendations are still valid as the latest devices to feature SATA controllers. TMS320C6748 would be the recommendation from your post.
Regards,
Kyle
Part Number: TMS320C6748 Hi, I would like to exclude damping resistors in the circuit configuration between the C6748 and DDR memory. Therefore, I am conducting a measurement of the DDR clock waveform change when the value of SDCR.DDRDRIVE0 is changed. …
Part Number: TMS320C6748 I use my custom board, the chip is C6748 and I use a eMMC for storage.
The FATFS runs well in my board, C6748 can read/write files in the eMMC. In fact, this board and application has been used for years in our products.
I can…
Part Number: TMS320C6748 Good day,
I am currently trying to find the symbol details of a breakpoint in the memory browser.
When the breakpoint is reached the symbol $C$RL362 is shown in the memory browser.
How can I navigate to that symbol in my code…
Part Number: TMS320C6748 Hi, support team
My customer has the questions as follow:
Could TMS320C6748 use this DSP CV Libraries? www.ti.com/.../open-cv.html
Or are there any OpenCV that TMS320C6748 can use?
Thanks so much.
Best regards, Yuki
Hello!
It's a great thing to post updates for the benefit of community, as often people disappear once their problem solved.
I have to start with disclaimer that we never use L2 for cache, but keep critical data and code there.
Next is cache coherency…
