Part Number: TUSB8041 Hi Team,
TUSB8041 has PWRCTL1/2/3/4. I was wondering how it works. When customer want downstream power switch turn off, does customer need to configure register to change the output status? Or TUSB8041 can detect if device are connected…
Part Number: TUSB8041 Hi Expert,
The engineer is asking how to produce the usb compliance test pattern (2.0 & 3.1) from the TUSB8041.
Pls advice.
Best regards,
Eric Lai
Field Application Engineer
Texas Instruments Taiwan Limited
O: +886-2-2175-…
Part Number: TUSB8041 Hi Team:
Hope you're doing well.
My customer HYC (leading T&M supplier) is developing the multiple screen testers. And they ask if TI have the 1:n buffers to duplicate the USB3.0 signal. Cause analog switches will affect the…
Part Number: TUSB8041 Hi team,
some questions for TUSB8041 application as follows, looking forward to your answers. Many thanks!
1. when using TUSB8041 as below image shown, is there any timing sequences requirements for chaining devices?
2. For downstream…
Part Number: TUSB8041-Q1 Hi Team,
My customer is considering TUSB8041IPAPQ1 and he wants to use 3 ports for USB3.0 and 1 port for USB2.0.
Customer have following questions, could you kindly help?
1. Can TUSB8041IPAPQ1 be used for USB3.0 and USB2.0 together…
Part Number: TUSB8041 Hi Team,
Could you help review schematic of TUSB8041 which my customer applies in their robot. Besides, I have some confusion about this device.
The schematic can be seen in this link: /cfs-file/__key/communityserver-discussions…
Hi JMMN,
1) I took a scope shot of UFP VBUS (PD Negotiated), and DFP VBUS(TUSB8041 Controlled) for the channel in question. The green line was added based on the Advisor T3 Logs - it is TERM = ON/OFF for DFP; and is turned on before UFP VBUS comes in... …
Part Number: TUSB8041 Hello. The data sheet describes quite clearly that the PWRCTL_POL pin must be pulled high to control Active High peripherals.
For security reasons I even have an additional 10k pullup to PWRCTL_POL.
When the linux kernel tries to…
Part Number: TUSB8041 Pin FULLPWR MGMTz is left floating , which should result in a logic low (internal pulldown).
I tie PWRCTL to logical high using a 10k Pullup .
To my understanding, this should result in enabling power to the port via a high signal…
