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Showing 83 results View by: Thread Post Sort by
  • SN65LVCP114: Trouble passing 12G SDI

    Shawn Workman
    Shawn Workman
    TI Thinks Resolved
    Part Number: SN65LVCP114 We are working on a design that currently includes the TI SN65LVCP114 2x1 mux / 1x2 demux chip. Our application is for SMPTE SDI video at bit rates from 270 Mb/s up to 12 Gb/s and we only use the 2x1 mux portion of the chip. In…
    • over 8 years ago
    • Interface
    • Interface forum
  • DS100KR401: DS100KR401 vs SN65LVCP114

    Michael Nycz
    Michael Nycz
    Part Number: DS100KR401 Other Parts Discussed in Thread: DS125BR820 , DS125BR401A , DS125BR401 I have a media converter design that converts between 10G-KR and 10G-SR (copper to fiber). I was having issues getting the 10G-KR side to link/pass data.…
    • over 8 years ago
    • Interface
    • Interface forum
  • RE: SN65LVCP114 cascading

    Diego Cortes
    Diego Cortes
    Hello Randy, I have no extra information. Regards, Diego.
    • over 9 years ago
    • Interface
    • Interface forum
  • RE: SN65LVCP114 SFI interface

    Randy Fung
    Randy Fung
    HI Michael, We ran into this problem right now. We have design that use this SN65LVCP114 back to back and to SFP+ on C port. We shall the eye got distorted. The length from this device is 3" to the SFP and about 2.5" between the SN65LVCP114. We saw…
    • over 9 years ago
    • Interface
    • Interface forum
  • Answered
  • how can I configure SN65LVCP114 as bypass mode?

    TS Yang
    TS Yang
    Resolved
    Hi, Just for test, I want to disable all functions such as EQ, and use SN65LVCP114 as switch. at this test, the only thing I need is just select lanes, and do not disturbed by other functions. If this possible, please let me know how. thanks,
    • Resolved
    • over 9 years ago
    • Interface
    • Interface forum
  • SN65LVCP114: SN651VCP114 hardware design, I want to use GPIO mode simultaneously compatible with I2C mode.

    user5164117
    user5164117
    Part Number: SN65LVCP114 SN651VCP114 hardware design, I want to use GPIO mode simultaneously compatible with I2C mode. Our signal is 10G-KR.EQX1 and EQX0 how many db we choose? LOOPBACK enabled or disabled? /PWD high? enables the AGC loop? VOD_A high…
    • over 8 years ago
    • Interface
    • Interface forum
  • SN65LVCP114 Power Dissipation RXAUI

    jack dawson
    jack dawson
    Hello, I am planning on using an SN65LVCP114 for an RXAUI application and am curious about the expected power dissipation. In this application only two of the the three ports will be used and the maximum data rate will be 6.25 Gb/s. The datasheet specifies…
    • over 10 years ago
    • Interface
    • Interface forum
  • SN65LVCP114 Unused Port IO

    jack dawson
    jack dawson
    Other Parts Discussed in Thread: SN65LVCP1414 , SN65LVCP1412 Hello, In my application, only two of the three available ports will be used. Is there a recommended strategy to setting the unused ports IO? (e.g. ground inputs, leave outputs floating, etc…
    • over 10 years ago
    • Interface
    • Interface forum
  • Bad eye diagram found on SN65LVCP114

    Randy Fung
    Randy Fung
    This is an urgent critical request. We are seeing quite a bit of jitter when we are going the SN65LVCP114 redriver chip. Our application on this TI-MUX chip (SN65LVCP114) is passing SFP+ traffic from A to B and vice versa. We ran into random CRC errors…
    • over 9 years ago
    • Interface
    • Interface forum
  • SN65LVCP114: SN651VCP114 hardware design, I want to use GPIO mode simultaneously compatible with I2C mode.

    user5164117
    user5164117
    Part Number: SN65LVCP114 SN651VCP114 hardware design, I want to use GPIO mode simultaneously compatible with I2C mode. Is the design of the drawing correct? Power VCC filter does not need to add magnetic beads just add capacitance?We use 10G-KR signal…
    • over 8 years ago
    • Interface
    • Interface forum
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