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CMEM question

In the following scenario on a DRA72x system : Linux normally on Cortex A15 but sometimes only the Cortex M4 is running, it is the case on power up.

Is it possible for the Cortex M4 to allocate memory instead of Linux and Linux still be able to use it once it is up and running?

I guess one way would be to store incoming data from the SPI (other processor and Microchip CAN devices) in local ram and copying in share memory if Linux is awake. It would be easier if I would not have to duplicate the memory buffers.

All SPI access to the external 3 CAN devices and co-processor is done using TI-RTOS on the Cortex M4 as well as local 2 CAN and LIN.

Can you point to a document where it explains how to use CMEM memory with both Linux and TI-RTOS on other cores?

Michel