Dear，
I want to connect every cores in TDA2x cores acccording to Vision SDK TDA2xx(v02.09.00) User Guide,
I do the operation according to this document step by step.
Firstly,I modified the gel files, TDA2xx_ddr_config.gel and TDA2xx_multicore_reset.gel as what mentioned in this user guide.
After I lauched .ccxml configurartion successfully,I connected cortex-A15_0 firstly,
but the following information shows in cansole windows:
CortexA15_0: GEL Output: EVE DPLL OPP 0 is DONE!
CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 clock config is in progress...
CortexA15_0: GEL Output: PCIE_REF DPLL already locked, now unlocking....
CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 is DONE!
CortexA15_0: GEL Output: --->>> PRCM Clock Configuration for OPP 0 is DONE! <<<---
CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules in progress... <<<---
CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules is DONE! <<<---
CortexA15_0: GEL Output: --->>> DDR3 Initialization is in progress ... <<<---
CortexA15_0: GEL Output: DDR DPLL clock config for 532MHz is in progress...
CortexA15_0: GEL Output: DDR DPLL already locked, now unlocking....
CortexA15_0: GEL Output: DDR DPLL clock config for 532MHz is in DONE!
CortexA15_0: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4C000060
at IODFT_TLGC=*((unsigned int *) (base_addr+0x60U)) [TDA2xx_ddr_config.gel:268]
at TDA2xx_reset_emif_params_ddr3_532(0x4c000000U) [TDA2xx_ddr_config.gel:1473]
at TDA2xx_DDR3_532MHz_Config() [TDA2xx_startup_common.gel:43]
at OnTargetConnect()
could you tell me what cause this problem and how to solve it?
whether some hardware settting should be cared,such as, jump header ，mode switch，and so on?
In addition,our board is EVM5777G-03040-00 -Vayu ES2.0 GP EVM
Thanks in advance
BRS,
Meng
