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Using xdma_event_intr2 for EDMA

Moonsun Park
Intellectual 595 points

Hi. 

I`m testing EDMA nowdays. I already success with GPIO_EVENT for EDMA but not xdma_event_intr0~2

somebody knows about this. please let me know.

Below is my Question

 

1. where is [ xdma_event_intr0~2 ]?? I`m beaglebone User. and found it in beaglebone schematic

XDMA_EVENT_INT0: GPIO0_19

XDMA_EVENT_INT2: GPIO0_29, GPIO0_6, GPIO0_7 

is this correct?? and where is XDMA_EVENT_INT1??

 

2. What makes these EVENTs happen??

I thought same as external GPIO Interrupt. but I don't know now.. and How to configure

 

3. I found  Control Module for PIN MUX in AM335x Tech ref manual. and about ( conf_xdma_event_intr0, conf_xdma_event_intr1)  Register

Where is conf_xdma_event_intr2??

 

4. I already know that needs for external gpio interrupt (ISR Register, In ISR (int_disable, int_clear, end of interrupt, int_enable)

but i cann't be certain about these EVENT(Interrupt, conf_xdma_event_intr2), plus is there any way not to register ISR?? i don't rellay need ISR

maybe it makes system slow

 

5.  last one, GPIO_EVENT for EDMA  does not distinguish between GPIO0_x and GPIO0_x

for example Does it mean GPIO1_7 and GPIO1_20 SAME??  GPIO0_EVENT for ARM??

 

thanks for reading my words . somebody help me..

  • 0
    Intellectual 835 points

    Hi,

    I have the same question,can I config  " xdma_event_intr0 " and " xdma_event_intr1 "  as external interrupts???

    thanks

    YanTCK

  • 0
    Prodigy 40 points

    Moonseon Park said:

    is this correct?? and where is XDMA_EVENT_INT1??

    2. What makes these EVENTs happen??

    I thought same as external GPIO Interrupt. but I don't know now.. and How to configure

     

    3. I found  Control Module for PIN MUX in AM335x Tech ref manual. and about ( conf_xdma_event_intr0, conf_xdma_event_intr1)  Register

    Where is conf_xdma_event_intr2??

    same problem as yours... can't find xdma_event_intr2 on AM335x.

    can't generate the external pin DMA event, but in interrupt mode the corresponding I/O pin generates its event in ER register.

  • 0 in reply to Eldoro
    Prodigy 40 points

    for those who wonder, XDMA_EVT_INTR0 has worked for me but the event can be generated on rising edge only (I was using falling edge, never worked no matter the config was)

    note that I use it to trig the DMA without CPU interrupt, in classic interrupt mode (GPIO) it works both edges but causes CPU interrupt which I don't want.

  • 0 in reply to Eldoro
    Prodigy 100 points

    Greeting Eldoro.


    Can you please provide some information on how you achieved this setting ? 

    Thanks