AM335X: Resuming overflowed CPSW port

Y tck

Hi,

I do some delay in the CPSW_ISR ,and transmit a great lot of data to the port, wanting to make a CPSW receive overflow,and successed,the register in the CPSW_CPDMA module ,DMASTATUS, which value is 0x00002000,meens " 0010 - Ownership bit not set in input buffer.",the port can not receive data anymore.

But,when I hope to resume this port,it seems difficult and failed,what should I do for this ,reset the CPSW module ?

Thanks.

YanTCK

over 13 years ago

0 Y tck over 13 years ago

Intellectual 835 points

Is there anyone who is informed about it ?

0 Y tck over 13 years ago in reply to Y tck

Intellectual 835 points

Additional,it occured to me once ,but not in AM335x,it is a Freescale PowerPC CPU, MPC8377E,It has a receive status register:

The URL :http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8377E&webpageId=1096561680087728801439&nodeId=018rH3Jk191439&fromPage=tax

The description :

RxBD queue 0 is halted. It is a hardware-initiated stop indication. (DMACTRL[GRS] being set by the user does
not cause a QHLT0 to be set.). The current frame and all other frames directed to a halted queue are
discarded. A write with a value of 1 re-enables the queue for receiving.
0 This queue is enabled for reception. (That is, it is not halted)
1 All controller receive activity to this queue is halted.

When it is overflowed,we just write 1 to this bit , so we can resume this channel.

I want to know ,whether the AM335x can resume the channel when it is overflowed just like this ,or must reset the CPDMA module ?

thanks.

YanTCk