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Boot sequence doesn't work with warm reset.

Lihua Zhu
Intellectual 900 points

Hi,

I set SYSBOOT[4:0] to 00100, which means boot sequence will be: UART0, XIP, MMC0, NAND. What I want is: if there is MMC card in place, boot from MMC card, otherwise, boot from Nand. It works when switch on the board. but it doesn't work if I run reboot in linux or run reset in u-boot. The board displays CCCCC and halt. After about 4 minute, I will restart. seems triggered by ROM boot watchdog.

Why? and how to fix this problem?

Thank you very much.

Best regards,

Lihua

  • 0
    Prodigy 60 points

    I am having the exact same problem using a nand cape.  Same boot sequence. Seems as though the nand flash is left in a state that prevents the processor from accessing anything on the GPMC bus after a reboot from linux or uboot.  When I take the cape off I can boot from the MMC every time.  It seems to have some thing to do with the nand not being in a correct state.

  • 0 in reply to William Craig
    Intellectual 740 points

    Hi,

    I have exactly same problem too - and a solution to solve it !

    On our board there is a 16-bit multiplexed GPMC bus with an FPGA and an 8-bit NAND flash connected to that bus. The problem is that the AM335x processors tries to boot from a tri-stated bus which results in an undefined behaviour during a warm start. The ROM checks for 2 values, 0x00000000 and 0xFFFFFFFF, at address 0x08000000.  If it is one of these 2 values,  then it assumes there is not a valid image in XIP and moves on to the next booting source.  If it reads any other value, it assumes there is a valid image and tries to execute it.

    To solve this problem I have enabled weak pull-up resistors in the FPGA for all GPMC_AD signals. Now rebooting works fine!

    Regards

    Reto