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AM335x: problem to implement burst DMA read for GPMC

Leonid Volpert
Prodigy 40 points

We are using TI-AM335x, 3.2 based kernel and AM335x General-Purpose EVM.

Our goal is to achieve > 100 MBps performance data rate from FPGA to processor using GPMC interface. To accomplish this goal we wrote a kernel module reading data in DMA mode using OMAP DMA service and are trying to add burst support on top of that.

 

Those are the questions we have:

  1. Is DMA and burst transfer can be combined together for the setup mentioned above?
  2. If yes, what kind of burst is supported (4, 8, 16 bytes)?
  3. What is a recommended way to implement it?

Because just setting burst mode for DMA:

omap_set_dma_src_burst_mode() / omap_set_dma_dest_burst_mode()

returns ‘un-supported SDMA wrapper’.

Examples of source code and / or references will be highly appreciated.

  • 0
    TI__Guru**** 1225732 points

    Hello Leonid,

    I'll try to look into it for you and will let you know latest by Tuesday.

     

  • 0 in reply to _nic
    Prodigy 40 points

    Hello _Nic

    Thanks for your response.

    This feature is really critical for us. If it is not achievable with AM335x we have to look for another CPU.

    Just to be more precise, we are looking for 4, 8 or 16 word burst and our word is 2 bytes.

  • 0 in reply to Leonid Volpert
    TI__Guru**** 1225732 points

    Leonid,

    I'm still looking into it. I'm sure you've seen this: http://e2e.ti.com/support/arm/sitara_arm/f/791/t/219984.aspx

    This makes me think it is supported but i'm looking for more detailed information on this.

  • 0 in reply to _nic
    TI__Genius 9190 points

    Hello Leonid,

    Burst of 4, 8 or 16 is supported on a 16b synchronous interface.  Please see section 7.1 (GPMC) of the TRM for details on burst mode.  

  • 0 in reply to Jeff Culverhouse
    TI__Guru**** 1225732 points

    Jeff,

    They are looking to achieve greater than 100MBs on the AM335x using GPMC & DMA+burst transfer. With your experience using GPMC and DMA+Burst transfer, is this data rate feasible? If not could you tell me what the limitation is?

    If it is possible, what is necessary/required to achieve the greater than 100MBs? What can they use to move further?

     

    Thank you and Best Regards

  • 0 in reply to _nic
    Prodigy 40 points

    Hi Jeff / _Nic,

    We did see this section of manual and, actually, GPMC burst mode (4 words, tested without DMA) is working in our system. DMA by itself is working as well. The problem we have is that we cannot combine them together to achieve necessary performance.

    The following are the pseudo code we are using in read call:

                 int nBytes = count * sizeof(UInt16);

                dma_addr_t dest_buf_phys;

                dma_addr_t src_buf_phys = (UInt32)(FPGA_BASE_ADDRESS + 0x200);

                UInt8 *dest_buf = (UInt8 *)kmalloc(nBytes, GFP_DMA | GFP_KERNEL);

                dest_buf_phys = dma_map_single(NULL, (void *)dest_buf, nBytes, DMA_FROM_DEVICE);

                           

                omap_set_dma_src_params(ch_out, 0, OMAP_DMA_AMODE_POST_INC, (UInt32)src_buf_phys, 0, 0);

                omap_set_dma_dest_params(ch_out, 0, OMAP_DMA_AMODE_POST_INC, dest_buf_phys, 0, 0);

                omap_set_dma_src_burst_mode(ch_out, OMAP_DMA_DATA_BURST_4);

                omap_set_dma_dest_burst_mode(ch_out, OMAP_DMA_DATA_BURST_4);

                omap_set_dma_transfer_params(ch_out, OMAP_DMA_DATA_TYPE_S16, nBytes/2, 1,

                                       OMAP_DMA_SYNC_FRAME, OMAP44XX_DMA_GPMC, OMAP_DMA_SRC_SYNC);

                omap_start_dma(ch_out);

    We suspect that driver (sdma2edma) is stopping us from the configuration we need. Since as we said before:

    omap_set_dma_src_burst_mode() / omap_set_dma_dest_burst_mode()

    returns ‘un-supported SDMA wrapper’

    Thanks again for your help.

  • 0 in reply to Leonid Volpert
    Intellectual 300 points

    Hi,

    Any answer to this issue? I have the same problem trying to implement burst in GPMC and DMA simultaneously with SYS/BIOS operating system. Is there any incompatibility?

    Thanks and regards,

    Gilen