• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 105 subscribers
  • Views 916 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM335x Interrupt question

UNA
Mastermind 7980 points

Hi,

I am trying INTC Preemptive Processing Sequence on AM335x device.

At that time, I've checked the following registers.

INTC_MIR3         : 0xDFFFFFFF

INTC_SIR_IRQ      : 0xFFFFFFFF

INTC_IRQ_PRI      : 0xFFFFFFC0

INTC_THRESH       : 0x0000003F

INTC_ITR3         : 0x00080000

INTC_PENDING_IRQ3 : 0x00000000

 

When I check INTC_SIR_IRQ, It seems that the INT127 has occurred.

However, INT127 is described as Reserved in the data sheet.

Does anyone know the factors that occur INT127 ?

 

Best Regards,

Chi

  • 0
    TI__Guru 68880 points

    Chi, this probably means that you are seeing a spurious interrupts or your interrupt handling is not correct.  When accessing INTC registers that clear interrupts or unmask interrupts,  ensure that reads/writes are completed by using memory barrier instructions or by declaring this area in the MMU as strongly ordered (this is indicated in step 6 in section 6.2.3 of the TRM).    Also check section 6.2.5 on some restrictions when accessing some of the registers.

    Regards,

    James